Issued Patents 2017
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9824930 | Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme | Takashi Ando, Hemanth Jagannathan, Balaji Kannan, Unoh Kwon, Rekha Rajaram | 2017-11-21 |
| 9799656 | Semiconductor device having a gate stack with tunable work function | Ruqiang Bao, Unoh Kwon, Vijay Narayanan | 2017-10-24 |
| 9768171 | Method to form dual tin layers as pFET work metal stack | Ruqiang Bao | 2017-09-19 |
| 9748354 | Multi-threshold voltage structures with a lanthanum nitride film and methods of formation thereof | Wei V. Tang, Paul F. Ma, Steven C. H. Hung, Michael P. Chudzik, Wenyu Zhang +6 more | 2017-08-29 |
| 9748145 | Semiconductor devices with varying threshold voltage and fabrication methods thereof | Balaji Kannan, Unoh Kwon, Takashi Ando, Vijay Narayanan | 2017-08-29 |
| 9741720 | Higher ‘K’ gate dielectric cap for replacement metal gate (RMG) FINFET devices | Shahab Siddiqui, Balaji Kannan | 2017-08-22 |
| 9721842 | Method of patterning dopant films in high-k dielectrics in a soft mask integration scheme | Takashi Ando, Hemanth Jagannathan, Balaji Kannan, Unoh Kwon, Rekha Rajaram | 2017-08-01 |
| 9704758 | Forming a semiconductor structure for reduced negative bias temperature instability | Ruqiang Bao | 2017-07-11 |
| 9691662 | Field effect transistors having multiple effective work functions | Takashi Ando, Min Dai, Balaji Kannan, Unoh Kwon | 2017-06-27 |
| 9679810 | Integrated circuit having improved electromigration performance and method of forming same | Joyeeta Nag, Shishir Ray, Andrew H. Simon, Oleg Gluschenkov, Michael P. Chudzik | 2017-06-13 |
| 9660027 | Expitaxially regrown heterostructure nanowire lateral tunnel field effect transistor | Unoh Kwon, Vijay Narayanan, Jeffrey W. Sleight | 2017-05-23 |
| 9627508 | Replacement channel TFET | Michael P. Chudzik, Unoh Kwon, Vijay Narayanan, Jeffrey W. Sleight | 2017-04-18 |
| 9583400 | Gate stack with tunable work function | Ruqiang Bao, Unoh Kwon, Vijay Narayanan | 2017-02-28 |
| 9576958 | Forming a semiconductor structure for reduced negative bias temperature instability | Ruqiang Bao | 2017-02-21 |
| 9559016 | Semiconductor device having a gate stack with tunable work function | Ruqiang Bao, Unoh Kwon, Vijay Narayanan | 2017-01-31 |
| 9553092 | Alternative threshold voltage scheme via direct metal gate patterning for high performance CMOS FinFETs | Ruqiang Bao, Unoh Kwon, Keith Kwong Hon Wong | 2017-01-24 |
| 9548381 | Method and structure for III-V nanowire tunnel FETs | Unoh Kwon, Vijay Narayanan, Jeffrey W. Sleight | 2017-01-17 |