Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
AR

Alexander Reznicek

IBM: 192 patents #2 of 10,852Top 1%
Globalfoundries: 12 patents #25 of 1,311Top 2%
RERenesas Electronics: 1 patents #273 of 915Top 30%
Troy, NY: #1 of 70 inventorsTop 2%
New York: #2 of 12,278 inventorsTop 1%
Overall (2017): #7 of 506,227Top 1%
204 Patents 2017

Issued Patents 2017

Showing 126–150 of 204 patents

Patent #TitleCo-InventorsDate
9659823 Highly scaled tunnel FET with tight pitch and method to fabricate same Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-23
9653285 Double aspect ratio trapping Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz 2017-05-16
9653582 Forming a Fin using double trench epitaxy Veeraraghavan S. Basker, Pouya Hashemi, Shogo Mochizuki 2017-05-16
9653580 Semiconductor device including strained finFET Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-16
9653541 Structure and method to make strained FinFET with improved junction capacitance and low leakage Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Kern Rim 2017-05-16
9653465 Vertical transistors having different gate lengths Karthik Balakrishnan, Pouya Hashemi, Tak H. Ning 2017-05-16
9653362 Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-16
9653289 Fabrication of nano-sheet transistors with different threshold voltages Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-16
9647123 Self-aligned sigma extension regions for vertical transistors Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-09
9647119 Structure and method for tensile and compressive strained silicon germanium with same germanium concentration by single epitaxy step Pranita Kerber, Qiqing C. Ouyang, Dominic J. Schepis 2017-05-09
9647113 Strained FinFET by epitaxial stressor independent of gate pitch Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz, Charan V. Surisetty 2017-05-09
9647112 Fabrication of strained vertical P-type field effect transistors by bottom condensation Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-09
9640667 III-V vertical field effect transistors with tunable bandgap source/drain regions Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-05-02
9633912 Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-04-25
9634142 Method for improving boron diffusion in a germanium-rich fin through germanium concentration reduction in fin S/D regions by thermal mixing Dominic J. Schepis, Pouya Hashemi, Kangguo Cheng 2017-04-25
9634028 Metallized junction FinFET structures Bruce B. Doris, Pranita Kerber, Joshua M. Rubin 2017-04-25
9633943 Method and structure for forming on-chip anti-fuse with reduced breakdown voltage Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2017-04-25
9633908 Method for forming a semiconductor structure containing high mobility semiconductor channel materials Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2017-04-25
9627270 Dual work function integration for stacked FinFET Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2017-04-18
9627536 Field effect transistors with strained channel features Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-04-18
9627491 Aspect ratio trapping and lattice engineering for III/V semiconductors Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2017-04-18
9627410 Metallized junction FinFET structures Bruce B. Doris, Pranita Kerber, Joshua M. Rubin 2017-04-18
9627381 Confined N-well for SiGe strain relaxed buffer structures Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-04-18
9627267 Integrated circuit having strained fins on bulk substrate and method to fabricate same Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2017-04-18
9620641 FinFET with epitaxial source and drain regions and dielectric isolated channel region Kangguo Cheng, Ramachandra Divakaruni, Ali Khakifirooz, Soon-Cheon Seo 2017-04-11