Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
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Alexander Reznicek

IBM: 126 patents #3 of 10,295Top 1%
Globalfoundries: 48 patents #4 of 2,145Top 1%
IBInternational Business: 1 patents #1 of 8Top 15%
Troy, NY: #1 of 72 inventorsTop 2%
New York: #2 of 11,723 inventorsTop 1%
Overall (2016): #21 of 481,213Top 1%
175 Patents 2016

Issued Patents 2016

Showing 151–175 of 175 patents

Patent #TitleCo-InventorsDate
9293459 Method and structure for improving finFET with epitaxy source/drain Kangguo Cheng, Ali Khakifirooz, Tenko Yamashita 2016-03-22
9293576 Semiconductor device with low-k gate cap and self-aligned contact Kangguo Cheng, Ali Khakifirooz, Charan V. Surisetty 2016-03-22
9293532 Gate-all-around nanowire MOSFET and method of formation Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-03-22
9293530 High aspect ratio trapping semiconductor with uniform height and isolated from bulk substrate Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-03-22
9293373 Method for fabricating CMOS finFETs with dual channel material Kangguo Cheng, Ali Khakifirooz, Pouya Hashemi 2016-03-22
9287135 Sidewall image transfer process for fin patterning Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy 2016-03-15
9287358 Stressed nanowire stack for field effect transistor Martin M. Frank, Pouya Hashemi, Ali Khakifirooz 2016-03-15
9287264 Epitaxially grown silicon germanium channel FinFET with silicon underlayer Kangguo Cheng, Eric C. Harley, Judson R. Holt, Gauri Karve, Yue Ke +4 more 2016-03-15
9281198 Method of fabricating a semiconductor device including embedded crystalline back-gate bias planes Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Raghavasimhan Sreenivasan 2016-03-08
9275854 Compound semiconductor integrated circuit and method to fabricate same Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-03-01
9276118 FinFET device having a merge source drain region under contact areas and unmerged fins between contact areas, and a method of manufacturing same Pranita Kerber, Qiqing C. Ouyang 2016-03-01
9276113 Structure and method to make strained FinFET with improved junction capacitance and low leakage Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Kern Rim 2016-03-01
9275908 Semiconductor device including gate channel having adjusted threshold voltage Pranita Kerber, Qiqing C. Ouyang 2016-03-01
9269627 Fin cut on SIT level Kangguo Cheng, Ali Khakifirooz, Tenko Yamashita 2016-02-23
9263584 Field effect transistors employing a thin channel region on a crystalline insulator structure Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-02-16
9263453 Secondary use of aspect ratio trapping holes as eDRAM structure Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz 2016-02-16
9257531 Self-aligned contact structure for replacement metal gate Soon-Cheon Seo, Balasubramanian S. Haran 2016-02-09
9257536 FinFET with crystalline insulator Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz, Raghavasimhan Sreenivasan 2016-02-09
9257527 Nanowire transistor structures with merged source/drain regions using auxiliary pillars Pouya Hashemi, Ali Khakifirooz 2016-02-09
9252016 Stacked nanowire Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-02-02
9252017 Stacked nanowire Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-02-02
9246003 FINFET structures with fins recessed beneath the gate Kangguo Cheng, Eric C. Harley, Yue Ke, Ali Khakifirooz 2016-01-26
9236463 Compressive strained III-V complementary metal oxide semiconductor (CMOS) device Thomas N. Adam, Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-01-12
9236397 FinFET device containing a composite spacer structure Judson R. Holt, Jinghong Li, Sanjay C. Mehta, Dominic J. Schepis 2016-01-12
9230992 Semiconductor device including gate channel having adjusted threshold voltage Pranita Kerber, Qiqing C. Ouyang 2016-01-05