Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
AR

Alexander Reznicek

IBM: 126 patents #3 of 10,295Top 1%
Globalfoundries: 48 patents #4 of 2,145Top 1%
IBInternational Business: 1 patents #1 of 8Top 15%
Troy, NY: #1 of 72 inventorsTop 2%
New York: #2 of 11,723 inventorsTop 1%
Overall (2016): #21 of 481,213Top 1%
175 Patents 2016

Issued Patents 2016

Showing 101–125 of 175 patents

Patent #TitleCo-InventorsDate
9379219 SiGe finFET with improved junction doping control Pranita Kerber, Qiqing C. Ouyang 2016-06-28
9379204 Lattice matched aspect ratio trapping to reduce defects in III-V layer directly grown on silicon Keith E. Fogel, Pouya Hashemi, Ali Khakifirooz 2016-06-28
9379111 Method of co-integration of strained silicon and strained germanium in semiconductor devices including fin structures Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-06-28
9378948 FinFET structures having silicon germanium and silicon fins Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz 2016-06-28
9373637 Epitaxial semiconductor resistor with semiconductor structures on same substrate Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz 2016-06-21
9373639 Thin channel-on-insulator MOSFET device with n+ epitaxy substrate and embedded stressor Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz 2016-06-21
9373638 Complementary metal-oxide silicon having silicon and silicon germanium channels Gen P. Lauer, Isaac Lauer, Jeffrey W. Sleight 2016-06-21
9373624 FinFET devices including epitaxially grown device isolation regions, and a method of manufacturing same Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-06-21
9368492 Forming fins of different materials on the same substrate Kangguo Cheng, Ali Khakifirooz, Dominic J. Schepis 2016-06-14
9368512 Double diamond shaped unmerged epitaxy for tall fins in tight pitch Kangguo Cheng, Dominic J. Schepis, Charan V. Surisetty 2016-06-14
9368350 Tone inverted directed self-assembly (DSA) fin patterning Hong He, Chi-Chun Liu, Chiahsun Tseng, Tenko Yamashita 2016-06-14
9362182 Forming strained fins of different material on a substrate Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz 2016-06-07
9362400 Semiconductor device including dielectrically isolated finFETs and buried stressor Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Kern Rim 2016-06-07
9362383 Highly scaled tunnel FET with tight pitch and method to fabricate same Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-06-07
9362362 FinFET with dielectric isolated channel Kangguo Cheng, Ali Khakifirooz, Soon-Cheon Seo 2016-06-07
9362310 Method of manufacturing a FinFET device using a sacrificial epitaxy region for improved fin merge and FinFET device formed by same Thomas N. Adam, Kangguo Cheng, Bruce B. Doris, Hong He, Ali Khakifirooz 2016-06-07
9362309 FinFET and method of fabrication Thomas N. Adam, Kangguo Cheng, Ali Khakifirooz 2016-06-07
9356027 Dual work function integration for stacked FinFET Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-05-31
9356163 Structure and method of integrating waveguides, photodetectors and logic devices Fei Liu, Christine Qiqing Ouyang, Jeremy D. Schaub 2016-05-31
9355887 Dual trench isolation for CMOS with hybrid orientations Victor Chan, Meikei Ieong, Rajesh Rengarajan, Chun-Yung Sung, Min Yang 2016-05-31
9349808 Double aspect ratio trapping Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz 2016-05-24
9349868 Gate all-around FinFET device and a method of manufacturing same Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi 2016-05-24
9349835 Methods for replacing gate sidewall materials with a low-k spacer Kangguo Cheng, Ali Khakifirooz, Charan V. Surisetty 2016-05-24
9349809 Aspect ratio trapping and lattice engineering for III/V semiconductors Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-05-24
9349594 Non-planar semiconductor device with aspect ratio trapping Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz 2016-05-24