| 9515252 |
Low degradation MRAM encapsulation process using silicon-rich silicon nitride film |
Anthony J. Annunziata, Chandrasekaran Kothandaraman, Junghyuk Lee, Nathan P. Marchack, Deborah A. Neumayer +2 more |
2016-12-06 |
| 9502640 |
Structure and method to reduce shorting in STT-MRAM device |
Anthony J. Annunziata, Nathan P. Marchack |
2016-11-22 |
| 9496184 |
III-V, SiGe, or Ge base lateral bipolar transistor and CMOS hybrid technology |
Josephine B. Chang, Isaac Lauer, Jeffrey W. Sleight |
2016-11-15 |
| 9466673 |
Complementary metal-oxide silicon having silicon and silicon germanium channels |
Isaac Lauer, Alexander Reznicek, Jeffrey W. Sleight |
2016-10-11 |
| 9450180 |
Structure and method to reduce shorting in STT-MRAM device |
Anthony J. Annunziata, Nathan P. Marchack |
2016-09-20 |
| 9397287 |
Magnetic tunnel junction with post-deposition hydrogenation |
Anthony J. Annunziata, Chandrasekharan Kothandaraman |
2016-07-19 |
| 9391163 |
Stacked planar double-gate lamellar field-effect transistor |
Josephine B. Chang, Michael A. Guillorn, Isaac Lauer, Jeffrey W. Sleight |
2016-07-12 |
| 9373638 |
Complementary metal-oxide silicon having silicon and silicon germanium channels |
Isaac Lauer, Alexander Reznicek, Jeffrey W. Sleight |
2016-06-21 |
| 9240324 |
Self-aligned process to fabricate a memory cell array with a surrounding-gate access transistor |
Matthew J. BrightSky, Chung H. Lam |
2016-01-19 |
