Issued Patents 2016
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9514263 | Chemo epitaxy mask generation | Joy Cheng, Gregory S. Doerk, Kafai Lai, HsinYu Tsai | 2016-12-06 |
| 9508829 | Nanosheet MOSFET with full-height air-gap spacer | Kangguo Cheng, Bruce B. Doris, Xin Miao | 2016-11-29 |
| 9496338 | Wire-last gate-all-around nanowire FET | Josephine B. Chang, Isaac Lauer, Jeffrey W. Sleight | 2016-11-15 |
| 9484205 | Semiconductor device having self-aligned gate contacts | Josephine B. Chang, Paul Chang | 2016-11-01 |
| 9472499 | Self-aligned pitch split for unidirectional metal wiring | Josephine B. Chang, Eric A. Joseph, Hiroyuki Miyazoe | 2016-10-18 |
| 9466534 | Cointegration of directed self assembly and sidewall image transfer patterning for sublithographic patterning with improved design flexibility | Markus Brink, Josephine B. Chang, Hsinuyu Tsai | 2016-10-11 |
| 9449820 | Epitaxial growth techniques for reducing nanowire dimension and pitch | Guy M. Cohen, Isaac Lauer, Jeffrey W. Sleight | 2016-09-20 |
| 9443949 | Techniques for multiple gate workfunctions for a nanowire CMOS technology | Josephine B. Chang, Isaac Lauer, Jeffrey W. Sleight | 2016-09-13 |
| 9443951 | Embedded planar source/drain stressors for a finFET including a plurality of fins | Josephine B. Chang, Paul Chang, Jeffrey W. Sleight | 2016-09-13 |
| 9437443 | Low-temperature sidewall image transfer process using ALD metals, metal oxides and metal nitrides | Markus Brink, Sebastian U. Engelmann, Hiroyuki Miyazoe, Adam M. Pyzyna, Jeffrey W. Sleight | 2016-09-06 |
| 9419097 | Replacement metal gate dielectric cap | Damon B. Farmer, Balasubramanian Pranatharthiharan, George S. Tulevski | 2016-08-16 |
| 9391163 | Stacked planar double-gate lamellar field-effect transistor | Josephine B. Chang, Gen P. Lauer, Isaac Lauer, Jeffrey W. Sleight | 2016-07-12 |
| 9385027 | Sublithographic Kelvin structure patterned with DSA | Josephine B. Chang, Chung-Hsun Lin, HsinYu Tsai | 2016-07-05 |
| 9385026 | Sublithographic Kelvin structure patterned with DSA | Josephine B. Chang, Chung-Hsun Lin, HsinYu Tsai | 2016-07-05 |
| 9368502 | Replacement gate multigate transistor for embedded DRAM | Josephine B. Chang, Leland Chang, Wilfried E. Haensch | 2016-06-14 |
| 9362354 | Tuning gate lengths in semiconductor device structures | Josephine B. Chang, Isaac Lauer, Jeffrey W. Sleight | 2016-06-07 |
| 9362355 | Nanosheet MOSFET with full-height air-gap spacer | Kangguo Cheng, Bruce B. Doris, Xin Miao | 2016-06-07 |
| 9349640 | Electrode pair fabrication using directed self assembly of diblock copolymers | Josephine B. Chang, Hiroyuki Miyazoe, Adam M. Pyzyna, HsinYu Tsai | 2016-05-24 |
| 9337264 | Process for forming a surrounding gate for a nanowire using a sacrificial patternable dielectric | Sarunya Bangsaruntip, Guy M. Cohen | 2016-05-10 |
| 9306164 | Electrode pair fabrication using directed self assembly of diblock copolymers | Josephine B. Chang, Hiroyuki Miyazoe, Adam M. Pyzyna, HsinYu Tsai | 2016-04-05 |
| 9263550 | Gate to diffusion local interconnect scheme using selective replacement gate flow | Josephine B. Chang, Isaac Lauer, Jeffrey W. Sleight | 2016-02-16 |