Issued Patents All Time
Showing 51–75 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504795 | Method for patterning a lanthanum containing layer | Kun-Yu Lee, Huicheng Chang, Che-Hao Chang, Ching-Hwanq Su, Xiong-Fei Yu | 2019-12-10 |
| 10483170 | Method of semiconductor integrated circuit fabrication | De-Wei Yu, Chia Ping Lo, Liang-Gi Yao, Yee-Chia Yeo, Ziwei Fang | 2019-11-19 |
| 10304835 | Semiconductor device and method | Cheng-Yen Tsai, Ming-Chi Huang, Zoe Chen, Wei-Chin Lee, Cheng-Lung Hung +2 more | 2019-05-28 |
| 10297453 | Pre-deposition treatment and atomic layer deposition (ALD) process and structures formed thereby | Cheng-Yen Tsai, Da-Yuan Lee, JoJo Lee, Ming-Hsing Tsai, Hsueh Wen Tsau +2 more | 2019-05-21 |
| 10014382 | Semiconductor device with sidewall passivation and method of making | Mrunal A. Khaderbad, Hsueh Wen Tsau, Chia-Ching Lee, Da-Yuan Lee, Hsiao-Kuan Wei +2 more | 2018-07-03 |
| 10008418 | Method of semiconductor integrated circuit fabrication | De-Wei Yu, Chia Ping Lo, Liang-Gi Yao, Yee-Chia Yeo, Ziwei Fang | 2018-06-26 |
| 9978601 | Methods for pre-deposition treatment of a work-function metal layer | Cheng-Yen Tsai, Hsin-Yi Lee, Chung-Chiang Wu, Da-Yuan Lee, Ming-Hsing Tsai | 2018-05-22 |
| 9947540 | Pre-deposition treatment and atomic layer deposition (ALD) process and structures formed thereby | Cheng-Yen Tsai, Da-Yuan Lee, JoJo Lee, Ming-Hsing Tsai, Hsueh Wen Tsau +2 more | 2018-04-17 |
| 9761683 | Semiconductor device and manufacturing method thereof | Chun-Yuan Chou, Chung-Chiang Wu, Da-Yuan Lee | 2017-09-12 |
| 9590065 | Semiconductor device with metal gate structure comprising work-function metal layer and work-fuction adjustment layer | Da-Yuan Lee, Kuan-Ting Liu, Hung-Chin Chung, Hsien-Ming Lee, Syun-Ming Jang +1 more | 2017-03-07 |
| 9293334 | N metal for FinFET and methods of forming | Po-Chin Kuo, Chung-Liang Cheng, Hsien-Ming Lee | 2016-03-22 |
| 9064857 | N metal for FinFET | Po-Chin Kuo, Chung-Liang Cheng, Hsien-Ming Lee | 2015-06-23 |
| 8846461 | Silicon layer for stopping dislocation propagation | Hsien-Hsin Lin, Chien-Chang Su, Kuan-Yu Chen, Hsueh-Chang Sung, Ming-Hua Yu | 2014-09-30 |
| 8344447 | Silicon layer for stopping dislocation propagation | Hsien-Hsin Lin, Chien-Chang Su, Kuan-Yu Chen, Hsueh-Chang Sung, Ming-Hua Yu | 2013-01-01 |
| 8258588 | Sealing layer of a field effect transistor | Yu-Chao Lin, Jr-Jung Lin, Yih-Ann Lin, Jih-Jse Lin, Chao-Cheng Chen +1 more | 2012-09-04 |
| 7834389 | Triangular space element for semiconductor device | Yu-Lien Huang, Yi-Chen Huang, Jim Huang, Hun-Jan Tao | 2010-11-16 |
| 7375040 | Etch stop layer | Simon Su-Horng Lin, Syun-Ming Jang, Mong-Song Liang | 2008-05-20 |
| 7253524 | Copper interconnects | Zhen-Cheng Wu, Tzu-Jen Chou, Yung-Cheng Lu, Syun-Ming Jang, Mong-Song Liang | 2007-08-07 |
| 7193325 | Reliability improvement of SiOC etch with trimethylsilane gas passivation in Cu damascene interconnects | Zhen-Cheng Wu, Bi-Troug Chen, Syun-Ming Jang, Su-Horng Lin | 2007-03-20 |
| 7119404 | High performance strained channel MOSFETs by coupled stress effects | Cheng-Hung Chang, Chu-Yun Fu | 2006-10-10 |
| 7115974 | Silicon oxycarbide and silicon carbonitride based materials for MOS devices | Zhen-Cheng Wu, Hung Chun Tsai, Da-Wen Lin, Shwang-Ming Cheng, Mong-Song Liang | 2006-10-03 |
| 7114450 | Magazine for receiving electric shock bullets | — | 2006-10-03 |
| 7002177 | Test region layout for shallow trench isolation | Chih-Cheng Lu, Stacey Fu, Syun-Ming Jang | 2006-02-21 |
| 6929533 | Methods for enhancing within-wafer CMP uniformity | — | 2005-08-16 |
| 6828245 | Method of improving an etching profile in dual damascene etching | — | 2004-12-07 |