Issued Patents All Time
Showing 1–25 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12356656 | FinFET structures and methods of forming the same | Yu-Sheng Wang, Chi-Cheng Hung, Chia-Ching Lee, Ching-Hwanq Su | 2025-07-08 |
| 12336244 | Metal caps for gate structures | Shih-Hang Chiu, Wei Wang, Chia-Wei Chen, Jian-Hao Chen, Kuan-Ting Liu +1 more | 2025-06-17 |
| 12310078 | Method of forming metal gate fin electrode structure by etching back metal fill | Shih-Hang Chiu, Wei Wang, Chi On Chui | 2025-05-20 |
| 12300733 | Semiconductor device with a work function layer having an oxygen-blocking dopant layer | Chia-Ching Lee, Hung-Chin Chung, Hsuan-Yu Tung, Kuan-Chang Chiu, Chien-Hao Chen +1 more | 2025-05-13 |
| 12272556 | Method of manufacturing a semiconductor device with a work-function layer having a concentration of fluorine | Jung-Shiung Tsai, Wei-Fan Liao, Han-Ti Hsiaw | 2025-04-08 |
| 12255104 | Semiconductor device and method of manufacture | Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Hung-Chin Chung +7 more | 2025-03-18 |
| 12183629 | Selective hybrid capping layer for metal gates of transistors | Po-Cheng Chen, Kuo-Chan Huang, Pin-Hsuan Yeh, Wei-Chin Lee, Hsien-Ming Lee +2 more | 2024-12-31 |
| 12183638 | In-situ formation of metal gate modulators | Hsin-Han Tsai, Cheng-Lung Hung, Weng Chang, Chi On Chui | 2024-12-31 |
| 12148810 | Semiconductor device and method | Shih-Hang Chiu, Jo-Chun Hung, Wei Wang, Kuan-Ting Liu, Chi On Chui | 2024-11-19 |
| 12142531 | Pre-deposition treatment for FET technology and devices formed thereby | Cheng-Yen Tsai, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee +3 more | 2024-11-12 |
| 12142530 | Semiconductor device and method of manufacture | Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen, Ching-Hwanq Su | 2024-11-12 |
| 12087767 | Method of tuning threshold voltages of transistors | Kuan-Chang Chiu, Chia-Ching Lee, Chien-Hao Chen, Hung-Chin Chung, Hsien-Ming Lee +2 more | 2024-09-10 |
| 12087637 | Semiconductor device and method of manufacture | Hsin-Han Tsai, Wei-Chin Lee, Chia-Ching Lee, Hung-Chin Chung, Cheng-Lung Hung +1 more | 2024-09-10 |
| 12040235 | Semiconductor device and method of manufacture | Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Hung-Chin Chung +7 more | 2024-07-16 |
| 12033893 | Contact plug with impurity variation | Hsueh Wen Tsau, Chia-Ching Lee, Cheng-Lung Hung, Ching-Hwanq Su | 2024-07-09 |
| 12021147 | FinFET structures and methods of forming the same | Yu-Sheng Wang, Chi-Cheng Hung, Chia-Ching Lee, Ching-Hwanq Su | 2024-06-25 |
| 11961732 | Controlling threshold voltages through blocking layers | Chia-Ching Lee, Shih-Hang Chiu, Hsuan-Yu Tung, Da-Yuan Lee | 2024-04-16 |
| 11935957 | Geometry for threshold voltage tuning on semiconductor device | Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai +3 more | 2024-03-19 |
| 11916146 | Gate resistance reduction through low-resistivity conductive layer | Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen | 2024-02-27 |
| 11842928 | In-situ formation of metal gate modulators | Hsin-Han Tsai, Cheng-Lung Hung, Weng Chang, Chi On Chui | 2023-12-12 |
| 11769694 | Contact plug with impurity variation | Hsueh Wen Tsau, Chia-Ching Lee, Cheng-Lung Hung, Ching-Hwanq Su | 2023-09-26 |
| 11728341 | Semiconductor device and method | Shih-Hang Chiu, Chih-Chang Hung, I-Wei Yang, Shu-Yuan Ku, Cheng-Lung Hung +2 more | 2023-08-15 |
| 11594610 | Semiconductor device and method | Shih-Hang Chiu, Jo-Chun Hung, Wei Wang, Kuan-Ting Liu, Chi On Chui | 2023-02-28 |
| 11563120 | FinFET structures and methods of forming the same | Yu-Sheng Wang, Chi-Cheng Hung, Chia-Ching Lee, Ching-Hwanq Su | 2023-01-24 |
| 11538805 | Method of tuning threshold voltages of transistors | Kuan-Chang Chiu, Chia-Ching Lee, Chien-Hao Chen, Hung-Chin Chung, Hsien-Ming Lee +2 more | 2022-12-27 |