Issued Patents All Time
Showing 301–325 of 365 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7071095 | Barrier metal re-distribution process for resistivity reduction | Cheng-Lin Huang, Ching-Hua Hsieh | 2006-07-04 |
| 7030023 | Method for simultaneous degas and baking in copper damascene process | Shing-Chyang Pan, Ching-Hua Hsieh, Jing-Cheng Lin, Hsien-Ming Lee, Cheng-Lin Huang | 2006-04-18 |
| 7015126 | Method of forming silicided gate structure | Chii-Ming Wu, Cheng-Tung Lin, Mei-Yun Wang, Chih-Wei Chang | 2006-03-21 |
| 6995471 | Self-passivated copper interconnect structure | Mong-Song Liang | 2006-02-07 |
| 6967155 | Adhesion of copper and etch stop layer for copper alloy | Jing-Cheng Lin, Ching-Hua Hsieh, Mong-Song Liang | 2005-11-22 |
| 6949472 | Method for high kinetic energy plasma barrier deposition | Cheng-Lin Huang, Ching-Hua Hsieh | 2005-09-27 |
| 6884736 | Method of forming contact plug on silicide structure | Chii-Ming Wu, Mei-Yun Wang, Chih-Wei Chang, Chin-Hwa Hsieh, Chu-Yun Fu +3 more | 2005-04-26 |
| 6878615 | Method to solve via poisoning for porous low-k dielectric | Ming-Hsing Tsai, Jing-Cheng Lin, Chen-Hua Yu | 2005-04-12 |
| 6864143 | Eliminate bridging between gate and source/drain in cobalt salicidation | Mei-Yun Wang | 2005-03-08 |
| 6849543 | Cobalt silicide formation method employing wet chemical silicon substrate oxidation | Mei-Yun Wang, Chih-Wei Chang, Ching-Hau Hsieh | 2005-02-01 |
| 6825520 | Capacitor with a roughened silicide layer | Cheng-Yeh Shih | 2004-11-30 |
| 6815336 | Planarization of copper damascene using reverse current electroplating and chemical mechanical polishing | Syun-Ming Jang | 2004-11-09 |
| 6806192 | Method of barrier-less integration with copper alloy | Jing-Cheng Lin, Cheng-Lin Huang, Ching-Hua Hsieh, Mong-Song Liang | 2004-10-19 |
| 6797144 | Method for reducing surface defects in an electrodeposition process | Hung-Wen Su, Shih-Wei Chou, Ching-Hua Hsieh | 2004-09-28 |
| 6759750 | Method for integrating low-K materials in semiconductor fabrication | Ming-Hsing Tsai | 2004-07-06 |
| 6737352 | Method of preventing particle generation in plasma cleaning | Chung-Shi Liu, Chen-Hua Ya | 2004-05-18 |
| 6736701 | Eliminate broken line damage of copper after CMP | Ying-Ho Chen, Wen-Chih Chiou, Tsu Shih, Syun-Ming Jang | 2004-05-18 |
| 6723639 | Prevention of post CMP defects in Cu/FSG process | Chung-Shi Liu | 2004-04-20 |
| 6716753 | Method for forming a self-passivated copper interconnect structure | Mong-Song Liang | 2004-04-06 |
| 6686280 | Sidewall coverage for copper damascene filling | Mei-Yun Wang, Chen-Hua Yu | 2004-02-03 |
| 6620725 | Reduction of Cu line damage by two-step CMP | Ming-Hsing Tsai, Wen-Jye Tsai, Ying-Ho Chen, Tsu Shih, Jih-Churng Twu +1 more | 2003-09-16 |
| 6610592 | Method for integrating low-K materials in semiconductor fabrication | Ming-Hsin Tsai | 2003-08-26 |
| 6576543 | Method for selectively depositing diffusion barriers | Jing-Cheng Lin | 2003-06-10 |
| 6562725 | Dual damascene structure employing nitrogenated silicon carbide and non-nitrogenated silicon carbide etch stop layers | Ming-Hsing Tsai, Ching-Hua Hsieh, Chen-Hua Yu | 2003-05-13 |
| 6551915 | Thermal annealing/hydrogen containing plasma method for forming structurally stable low contact resistance damascene conductor structure | Jing-Cheng Lin | 2003-04-22 |