SS

Sey-Ping Sun

TSMC: 47 patents #696 of 12,232Top 6%
AM AMD: 26 patents #370 of 9,279Top 4%
UC Uwiz Technology Co.: 2 patents #9 of 20Top 45%
AP Advanced Microdevices Pvt: 1 patents #2 of 26Top 8%
📍 Baoshan, TX: #1 of 14 inventorsTop 8%
Overall (All Time): #26,431 of 4,157,543Top 1%
74
Patents All Time

Issued Patents All Time

Showing 51–74 of 74 patents

Patent #TitleCo-InventorsDate
8003459 Method for forming semiconductor devices with active silicon height variation David E. Brown, Hans Van Meer 2011-08-23
7666735 Method for forming semiconductor devices with active silicon height variation David E. Brown, Hans Van Meer 2010-02-23
7053400 Semiconductor device based on Si-Ge with high stress liner for enhanced channel carrier mobility David E. Brown 2006-05-30
7009226 In-situ nitride/oxynitride processing with reduced deposition surface pattern sensitivity 2006-03-07
6955931 Method for detecting silicide encroachment of a gate electrode in a semiconductor arrangement David E. Brown 2005-10-18
6492281 Method of fabricating conductor structures with metal comb bridging avoidance Shengnian Song, Bradley Marc Davis 2002-12-10
6417014 Method and apparatus for reducing wafer to wafer deposition variation Kin-Sang Lam 2002-07-09
6383874 In-situ stack for high volume production of isolation regions Mark I. Gardner, Robert Anderson 2002-05-07
6372668 Method of forming silicon oxynitride films Homi E. Nariman, Hartmut Ruelke 2002-04-16
6265283 Self-aligning silicon oxynitride stack for improved isolation structure Homi E. Nariman, H. Jim Fulford 2001-07-24
6259133 Method for forming an integrated circuit memory cell and product thereof Mark I. Gardner 2001-07-10
6257760 Using a superlattice to determine the temperature of a semiconductor fabrication process Bradley Marc Davis, Shengnian Song 2001-07-10
6258730 Ultra-thin gate oxide formation using an N2O plasma Mark I. Gardner, Shengnian Song 2001-07-10
6251800 Ultrathin deposited gate dielectric formation using low-power, low-pressure PECVD for improved semiconductor device performance Mark I. Gardner, Charles E. May 2001-06-26
6242367 Method of forming silicon nitride films Minh Van Ngo 2001-06-05
6171917 Transistor sidewall spacers composed of silicon nitride CVD deposited from a high density plasma source Thomas E. Spikes, Jr., Fred N. Hause 2001-01-09
6150286 Method of making an ultra thin silicon nitride film Mark I. Gardner, Shengnian Song 2000-11-21
6140688 Semiconductor device with self-aligned metal-containing gate Mark I. Gardner 2000-10-31
6124217 In-situ SiON deposition/bake/TEOS deposition process for reduction of defects in interlevel dielectric for integrated circuit interconnects Mark I. Gardner, Minh Van Ngo 2000-09-26
6114219 Method of manufacturing an isolation region in a semiconductor device using a flowable oxide-generating material Thomas E. Spikes, Jr., Robert Dawson 2000-09-05
6060404 In-situ deposition of stop layer and dielectric layer during formation of local interconnects Minh Van Ngo, Darin A. Chan, Terri Jo Kitson, John Caffall 2000-05-09
6051876 Semiconductor device with a graded passivation layer Mark I. Gardner, Daniel Kadosh 2000-04-18
6037244 Method of manufacturing a semiconductor device using advanced contact formation Mark I. Gardner, Thomas E. Spikes, Jr., Robert Paiz, Frederick N. Hause 2000-03-14
6022749 Using a superlattice to determine the temperature of a semiconductor fabrication process Bradley Marc Davis, Shengnian Song 2000-02-08