Issued Patents All Time
Showing 26–50 of 117 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10163885 | Systems and methods for a sequential spacer scheme | Shih-Ming Chang, Ru-Gun Liu, Tsai-Sheng Gau | 2018-12-25 |
| 10153166 | Mechanisms for forming patterns using lithography processes | Shih-Ming Chang, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau | 2018-12-11 |
| 10115796 | Method of pulling-back sidewall metal layer | Jin-Dah Chen, Han-Wei Wu | 2018-10-30 |
| 10096519 | Method of making a FinFET device | Wen-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh | 2018-10-09 |
| 10049919 | Semiconductor device including a target integrated circuit pattern | Chieh-Han Wu, Cheng-Hsiung Tsai, Chung-Ju Lee, Ru-Gun Liu, Shau-Lin Shue +1 more | 2018-08-14 |
| 10049885 | Method for patterning a plurality of features for fin-like field-effect transistor (FinFET) devices | Hoi-Tou Ng, Kuei-Liang Lu, Ru-Gun Liu | 2018-08-14 |
| 10048590 | Method and apparatus of patterning a semiconductor device | Chien-Wei Wang, Ching-Yu Chang | 2018-08-14 |
| 10043759 | Overlay mark | Chen Chen, Ching-Yu Chang | 2018-08-07 |
| 10032664 | Methods for patterning a target layer through fosse trenches using reverse sacrificial spacer lithography | Shih-Ming Chang, Ken-Hsien Hsieh, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau | 2018-07-24 |
| 10014175 | Lithography using high selectivity spacers for pitch reduction | Yu-Sheng Chang, Cheng-Hsiung Tsai, Chung-Ju Lee, Hai-Ching Chen, Hsiang-Huan Lee +5 more | 2018-07-03 |
| 9929153 | Method of making a FinFET device | Weng-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh | 2018-03-27 |
| 9917192 | Structure and method for transistors with line end extension | Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang +2 more | 2018-03-13 |
| 9904163 | Cut-mask patterning process for FIN-like field effect transistor (FINFET) device | Wei-De Ho, Ching-Yu Chang, Kuei-Liang Lu | 2018-02-27 |
| 9773676 | Lithography using high selectivity spacers for pitch reduction | Yu-Sheng Chang, Cheng-Hsiung Tsai, Chung-Ju Lee, Hai-Ching Chen, Hsiang-Huan Lee +5 more | 2017-09-26 |
| 9761436 | Mechanisms for forming patterns using multiple lithography processes | Shih-Ming Chang, Chih-Ming Lai, Ru-Gun Liu, Tsai-Sheng Gau | 2017-09-12 |
| 9735140 | Systems and methods for a sequential spacer scheme | Shih-Ming Chang, Ru-Gun Liu, Tsai-Sheng Gau | 2017-08-15 |
| 9711604 | Loading effect reduction through multiple coat-etch processes | Jin-Dah Chen, Han-Wei Wu, Yu-Hsien Lin, Po-Chun Liu, Stan Chen | 2017-07-18 |
| 9673328 | Structure and method for providing line end extensions for fin-type active regions | Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang +2 more | 2017-06-06 |
| 9634001 | System and methods for converting planar design to FinFET design | Clement Hsingjen Wann, Chih-Sheng Chang, Yi-Tang Lin, Ting-Chu Ko, Chung-Hsien Chen | 2017-04-25 |
| 9627262 | Method of patterning features of a semiconductor device | Wei-Chao Chiu, Chen Chen, Chih-Ming Lai, Nian-Fuh Cheng, Ru-Gun Liu +1 more | 2017-04-18 |
| 9595440 | Method of using a vaporizing spray system to perform a trimming process | Ching-Yu Chang, Kuei-Liang Lu | 2017-03-14 |
| 9581900 | Self aligned patterning with multiple resist layers | Chih-Ming Lai, Ken-Hsien Hsieh, Ru-Gun Liu, Shih-Ming Chang | 2017-02-28 |
| 9576814 | Method of spacer patterning to form a target integrated circuit pattern | Chieh-Han Wu, Cheng-Hsiung Tsai, Chung-Ju Lee, Ru-Gun Liu, Shau-Lin Shue +1 more | 2017-02-21 |
| 9564327 | Method for forming line end space structure using trimmed photo resist | Chia-Ying Lee, Jyu-Horng Shieh, Shih-Ming Chang, Chih-Ming Lai, Ken-Hsien Hsieh +1 more | 2017-02-07 |
| 9524939 | Multiple edge enabled patterning | Ya Hui Chang, Ru-Gun Liu, Tsong-Hua Ou, Ken-Hsien Hsieh, Burn Jeng Lin | 2016-12-20 |