Issued Patents All Time
Showing 126–150 of 221 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8598630 | Photo alignment mark for a gate last process | Gary Shen, Ming-Yuan Wu, Chiung-Han Yeh, Harry-Hak-Lay Chuang | 2013-12-03 |
| 8558278 | Strained transistor with optimized drive current and method of forming | Harry-Hak-Lay Chuang, Wen-Huei Guo, Mong-Song Liang | 2013-10-15 |
| 8552522 | Dishing-free gap-filling with multiple CMPs | Ming-Yuan Wu, Chiung-Han Yeh, Harry-Hak-Lay Chuang, Mong-Song Liang | 2013-10-08 |
| 8530326 | Method of fabricating a dummy gate structure in a gate last process | Su-Chen Lai, Ming-Yuan Wu, Hak-Lay Chuang, Chiung-Han Yeh, Hong-Dyi Chang +3 more | 2013-09-10 |
| 8502326 | Gate dielectric formation for high-voltage MOS devices | Jiun-Lei Jerry Yu, Chien-Chih Chou, Chun Lin Tsai | 2013-08-06 |
| 8497169 | Method for protecting a gate structure during contact formation | Hong-Dyi Chang, Pei-Chao Su, Hun-Jan Tao, Harry-Hak-Lay Chuang | 2013-07-30 |
| 8487382 | Device scheme of HKMG gate-last process | Sheng-Chen Chung, Harry Chuang | 2013-07-16 |
| 8476126 | Gate stack for high-K/metal gate last process | Harry-Hak-Lay Chuang, Chiung-Han Yeh | 2013-07-02 |
| 8461654 | Spacer shape engineering for void-free gap-filling process | Ming-Yuan Wu, Yi-Shien Mor, Chih-Tang Peng, Chiung-Han Yeh, Harry-Hak-Lay Chuang +1 more | 2013-06-11 |
| 8461629 | Semiconductor device and method of fabricating same | Chung Long Cheng, Sheng-Chen Chung, Harry-Hak-Lay Chuang, Mong-Song Liang | 2013-06-11 |
| 8394692 | Integrating a first contact structure in a gate last process | Chiung-Han Yeh, Ming-Yuan Wu, Harry-Hak-Lay Chuang, Mong-Song Liang | 2013-03-12 |
| 8390072 | Chemical mechanical polishing (CMP) method for gate last process | Harry-Hak-Lay Chuang, Su-Chen Lai, Gary Shen | 2013-03-05 |
| 8389348 | Mechanism of forming SiC crystalline on Si substrates to allow integration of GaN and Si electronics | Jiun-Lei Jerry Yu, Chun Lin Tsai, Hsiao-Chin Tuan, Alex Kalnitsky | 2013-03-05 |
| 8372706 | Semiconductor device fabrication method including hard mask and sacrificial spacer elements | Shun-Jang Liao, Sheng-Chen Chung, Harry-Hak-Lay Chuang | 2013-02-12 |
| 8368170 | Reducing device performance drift caused by large spacings between active regions | Harry-Hak-Lay Chuang, Mong-Song Liang | 2013-02-05 |
| 8368136 | Integrating a capacitor in a metal gate last process | Harry-Hak-Lay Chuang, Tzung-Chi Lee, Sheng-Chen Chung, Mong-Song Liang | 2013-02-05 |
| 8367515 | Hybrid shallow trench isolation for high-k metal gate device improvement | Chung Long Cheng, Harry-Hak-Lay Chuang | 2013-02-05 |
| 8361866 | Modifying work function in PMOS devices by counter-doping | Chun-Yi Lee, Harry-Hak-Lay Chuang, Ping-Wei Wang | 2013-01-29 |
| 8349732 | Implanted metal silicide for semiconductor device | Harry-Hak-Lay Chuang, Hung-Chih Tsai, Keh-Chiang Ku, Mong-Song Liang | 2013-01-08 |
| 8349680 | High-k metal gate CMOS patterning method | Harry-Hak-Lay Chuang, Ryan Chia-Jen Chen, Su-Chen Lai, Yi-Shien Mor, Yi-Hsing Chen +2 more | 2013-01-08 |
| 8334572 | Resistive device for high-k metal gate technology | Sheng-Chen Chung, Harry-Hak-Lay Chuang | 2012-12-18 |
| 8324046 | Poly resistor and poly eFuse design for replacement gate technology | Harry-Hak-Lay Chuang | 2012-12-04 |
| 8304839 | Poly resistor and poly eFuse design for replacement gate technology | Harry-Hak-Lay Chuang | 2012-11-06 |
| 8286114 | 3-dimensional device design layout | Harry-Hak-Lay Chuang, Mong-Song Liang, Sheng-Chen Chung, Chih-Tsung Yao, Jung-Hui Kao +3 more | 2012-10-09 |
| 8237201 | Layout methods of integrated circuits having unit MOS devices | Harry-Hak-Lay Chuang, Jen-Bin Hsu, Chung Long Cheng, Mong-Song Liang | 2012-08-07 |