Issued Patents All Time
Showing 1–25 of 95 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12419074 | Barrier structure configured to increase performance of III-V devices | Yun-Hsiang Wang, Chun Lin Tsai, Po-Chih Chen, Chia-Ling Yeh, Ching-Yu Chen | 2025-09-16 |
| 12324211 | Ring transistor structure | Aurelien Gauthier Brun, Chun Lin Tsai, Po-Chih Chen, Yun-Hsiang Wang | 2025-06-03 |
| 12278272 | Source leakage current suppression by source surrounding gate structure | Aurelien Gauthier Brun, Chun Lin Tsai, Po-Chih Chen, Yun-Hsiang Wang | 2025-04-15 |
| 12272741 | Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance | Man-Ho Kwan, Fu-Wei Yao, Chun Lin Tsai, Ting-Fu Chang | 2025-04-08 |
| 12230690 | Method of forming a high electron mobility transistor | Chun-Wei Hsu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang, Chun Lin Tsai | 2025-02-18 |
| 12107156 | Semiconductor structure, HEMT structure and method of forming the same | Yao-Chung Chang, Po-Chih Chen, Chun Lin Tsai | 2024-10-01 |
| 12094838 | Crack stop ring trench to prevent epitaxy crack propagation | Jiun-Yu Chen, Chun Lin Tsai, Yun-Hsiang Wang, Chia-Hsun Wu, Po-Chih Chen | 2024-09-17 |
| 12087820 | Semiconductor device having a plurality of III-V semiconductor layers | Yu-Syuan Lin, Ming-Cheng Lin, Chun Lin Tsai | 2024-09-10 |
| 12046537 | Front-end-of-line (FEOL) through semiconductor-on-substrate via (TSV) | Yun-Hsiang Wang, Chun Lin Tsai, Po-Chih Chen | 2024-07-23 |
| 11843047 | Integration of p-channel and n-channel E-FET III-V devices without parasitic channels | Man-Ho Kwan, Fu-Wei Yao, Chun Lin Tsai, Ting-Fu Chang | 2023-12-12 |
| 11824109 | Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance | Man-Ho Kwan, Fu-Wei Yao, Chun Lin Tsai, Ting-Fu Chang | 2023-11-21 |
| 11804538 | Method of forming a high electron mobility transistor | Chun-Wei Hsu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang, Chun Lin Tsai | 2023-10-31 |
| 11798899 | Crack stop ring trench to prevent epitaxy crack propagation | Jiun-Yu Chen, Chun Lin Tsai, Yun-Hsiang Wang, Chia-Hsun Wu, Po-Chih Chen | 2023-10-24 |
| 11791388 | Source leakage current suppression by source surrounding gate structure | Aurelien Gauthier Brun, Chun Lin Tsai, Po-Chih Chen, Yun-Hsiang Wang | 2023-10-17 |
| 11715792 | Barrier structure configured to increase performance of III-V devices | Yun-Hsiang Wang, Chun Lin Tsai, Po-Chih Chen, Chia-Ling Yeh, Ching-Yu Chen | 2023-08-01 |
| 11705486 | Isolation structure for active devices | Fu-Wei Yao, Chun Lin Tsai, Man-Ho Kwan | 2023-07-18 |
| 11664431 | Ring transistor structure | Aurelien Gauthier Brun, Chun Lin Tsai, Po-Chih Chen, Yun-Hsiang Wang | 2023-05-30 |
| 11631741 | Semiconductor device | Yu-Syuan Lin, Ming-Cheng Lin, Chun Lin Tsai | 2023-04-18 |
| 11532740 | Semiconductor structure, HEMT structure and method of forming the same | Yao-Chung Chang, Po-Chih Chen, Chun Lin Tsai | 2022-12-20 |
| 11522077 | Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance | Man-Ho Kwan, Fu-Wei Yao, Chun Lin Tsai, Ting-Fu Chang | 2022-12-06 |
| 11521915 | Front-end-of-line (FEOL) through semiconductor-on-substrate via (TSV) | Yun-Hsiang Wang, Chun Lin Tsai, Po-Chih Chen | 2022-12-06 |
| 11404557 | Method of forming a high electron mobility transistor | Chun-Wei Hsu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang, Chun Lin Tsai | 2022-08-02 |
| 11349023 | Integration of p-channel and n-channel E-FET III-V devices without parasitic channels | Man-Ho Kwan, Fu-Wei Yao, Chun Lin Tsai, Ting-Fu Chang | 2022-05-31 |
| 11222968 | HEMT device structure and manufacturing method thereof | Po-Chih Chen, Yao-Chung Chang, Chun Lin Tsai | 2022-01-11 |
| 10964804 | Semiconductor structure, HEMT structure and method of forming the same | Yao-Chung Chang, Po-Chih Chen, Chun Lin Tsai | 2021-03-30 |