Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12272741 | Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu, Ting-Fu Chang | 2025-04-08 |
| 11854909 | Semiconductor structure and method for manufacturing thereof | Fu-Wei Yao, Ru-Yi Su, Chun Lin Tsai, Alexander Kalnitsky | 2023-12-26 |
| 11843047 | Integration of p-channel and n-channel E-FET III-V devices without parasitic channels | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu, Ting-Fu Chang | 2023-12-12 |
| 11824109 | Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu, Ting-Fu Chang | 2023-11-21 |
| 11705486 | Isolation structure for active devices | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu | 2023-07-18 |
| 11522077 | Integration of p-channel and n-channel E-FET III-V devices with optimization of device performance | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu, Ting-Fu Chang | 2022-12-06 |
| 11430702 | Semiconductor structure and method for manufacturing thereof | Fu-Wei Yao, Ru-Yi Su, Chun Lin Tsai, Alexander Kalnitsky | 2022-08-30 |
| 11349023 | Integration of p-channel and n-channel E-FET III-V devices without parasitic channels | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu, Ting-Fu Chang | 2022-05-31 |
| 10854711 | Isolation structure for active devices | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu | 2020-12-01 |
| 10522618 | Isolation structure for active devices | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu | 2019-12-31 |
| 10411681 | Semiconductor device and circuit protecting method | Fu-Wei Yao, Ru-Yi Su, King-Yuen Wong | 2019-09-10 |
| 10319644 | Method for manufacturing semiconductor structure | Fu-Wei Yao, Ru-Yi Su, Chun Lin Tsai, Alexander Kalnitsky | 2019-06-11 |
| 10276657 | Isolation structure for active devices | Fu-Wei Yao, Chun Lin Tsai, Jiun-Lei Jerry Yu | 2019-04-30 |
| 10068976 | Enhancement mode field-effect transistor with a gate dielectric layer recessed on a composite barrier layer for high static performance | Chia-Ling Yeh, Kuei-Ming Chen, Jiun-Lei Jerry Yu, Chun Lin Tsai | 2018-09-04 |
| 9882553 | Semiconductor device and circuit protecting method | Fu-Wei Yao, Ru-Yi Su, King-Yuen Wong | 2018-01-30 |
| 9627275 | Hybrid semiconductor structure on a common substrate | Fu-Wei Yao, Ru-Yi Su, Chun Lin Tsai, Alexander Kalnitsky | 2017-04-18 |
| 9160326 | Gate protected semiconductor devices | Jing Chen | 2015-10-13 |