Issued Patents All Time
Showing 26–50 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10043919 | Memory devices and methods of manufacture thereof | Alexander Kalnitsky, Felix Ying-Kit Tsui, Hau-Yan Lu | 2018-08-07 |
| 10014291 | SiC crystalline on Si substrates to allow integration of GaN and Si electronics | Kong-Beng Thei, Jiun-Lei Jerry Yu, Chun Lin Tsai, Alex Kalnitsky | 2018-07-03 |
| 9735266 | Self-aligned contact for trench MOSFET | Alex Kalnitsky, Kuo-Ming Wu, Wei-Tsung Huang | 2017-08-15 |
| 9698044 | Localized carrier lifetime reduction | Alex Kalnitsky, Chih-Wen Yao, Jun Cai, Ruey-Hsin Liu | 2017-07-04 |
| 9601411 | Semiconductor structure | Alexander Kalnitsky, Shih-Fen Huang, Hsin-Li Cheng, Felix Ying-Kit Tsui | 2017-03-21 |
| 9437494 | Semiconductor arrangement and formation thereof | Alexander Kalnitsky, Kong-Beng Thei, Chien-Chih Chou, Chen-Liang Chu | 2016-09-06 |
| 9431107 | Memory devices and methods of manufacture thereof | Alexander Kalnitsky, Felix Ying-Kit Tsui, Hau-Yan Lu | 2016-08-30 |
| 9236326 | Semiconductor structure and fabricating method thereof | Alexander Kalnitsky, Shih-Fen Huang, Hsin-Li Cheng, Felix Ying-Kit Tsui | 2016-01-12 |
| 9224732 | Method of forming high voltage device | Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao, Chia-Chin Shen, Eric Huang +2 more | 2015-12-29 |
| 8779505 | Quasi-vertical structure for high voltage MOS device | Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao | 2014-07-15 |
| 8704312 | High voltage devices and methods of forming the high voltage devices | Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao, Chia-Chin Shen, Eric Huang +2 more | 2014-04-22 |
| 8664718 | Power MOSFETs and methods for forming the same | Chih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu | 2014-03-04 |
| 8633086 | Power devices having reduced on-resistance and methods of their manufacture | Alex Kalnitsky, Liang Han, Uway Tseng, Yuan-Chih Hsieh, Hung-Hua Lin | 2014-01-21 |
| 8507988 | High voltage devices, systems, and methods for forming the high voltage devices | Chih-Wen Yao, Robert S. J. Pan, Ruey-Hsin Liu, Hsueh-Liang Chou, Puo-Yu Chiang +1 more | 2013-08-13 |
| 8497551 | Self-aligned contact for trench MOSFET | Alex Kalnitsky, Kuo-Ming Wu, Wei-Tsung Huang | 2013-07-30 |
| 8461647 | Semiconductor device having multi-thickness gate dielectric | Hsueh-Liang Chou, Ruey-Hsin Liu, Chih-Wen Yao | 2013-06-11 |
| 8445955 | Quasi-vertical structure for high voltage MOS device | Chih-Chang Cheng, Ruey-Hsin Liu, Chih-Wen Yao | 2013-05-21 |
| 8389348 | Mechanism of forming SiC crystalline on Si substrates to allow integration of GaN and Si electronics | Kong-Beng Thei, Jiun-Lei Jerry Yu, Chun Lin Tsai, Alex Kalnitsky | 2013-03-05 |
| 8390024 | Electrostatic discharge (ESD) protection circuit | Liping Ren, Dah-Chuen Ho | 2013-03-05 |
| 6306759 | Method for forming self-aligned contact with liner | Tzu-Shih Yen, Erik S. Jeng, Chun-Yao Chen, Eddy Chiang, Wen-Shiang Liao | 2001-10-23 |
| 6221558 | Anti-reflection oxynitride film for polysilicon substrates | Liang-Gi Yao, John Lin, Hua-Tai Lin, Erik S. Jeng | 2001-04-24 |
| 5840605 | Dual layer polysilicon capacitor node DRAM process | — | 1998-11-24 |
| 5429714 | Fabrication method to produce pit-free polysilicon buffer local oxidation isolation | Hu H. Chao | 1995-07-04 |
| 5395784 | Method of manufacturing low leakage and long retention time DRAM | Chih-Yuan Lu, Nicky C. Lu | 1995-03-07 |
| 5374577 | Polysilicon undercut process for stack DRAM | — | 1994-12-20 |