Issued Patents All Time
Showing 1–25 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176407 | Method of forming a transistor device with a gate structure having a pair of recess regions and a resistive protection layer within | Chen-Liang Chu, Chien-Chih Chou, Yi-Huan Chen, Kong-Beng Thei, Ming-Ta Lei +2 more | 2024-12-24 |
| 12074208 | Method of making triple well isolated diode | Fu-Yu Chu, Ruey-Hsin Liu | 2024-08-27 |
| 11923429 | Plate design to decrease noise in semiconductor devices | Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang | 2024-03-05 |
| 11817396 | Layout to reduce noise in semiconductor devices | Fu-Yu Chu, Ruey-Hsin Liu | 2023-11-14 |
| 11769812 | Semiconductor device having multiple wells and method of making | Fu-Yu Chu, Ruey-Hsin Liu | 2023-09-26 |
| 11676997 | High voltage resistor with high voltage junction termination | Ru-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Ruey-Hsin Liu | 2023-06-13 |
| 11532701 | Semiconductor isolation structure and method for making the semiconductor isolation structure | Hsin Fu Lin, Tsung-Hao Yeh, Chien-Hung Liu, Shiang-Hung Huang, Chih-Wei Hung +2 more | 2022-12-20 |
| 11444169 | Transistor device with a gate structure having recesses overlying an interface between isolation and device regions | Chen-Liang Chu, Chien-Chih Chou, Yi-Huan Chen, Kong-Beng Thei, Ming-Ta Lei +2 more | 2022-09-13 |
| 11158739 | Semiconductor structure having field plate and associated fabricating method | Fu-Yu Chu, Ruey-Hsin Liu, Kuang-Hsin Chen, Chih-Hsin Ko, Shih-Fen Huang | 2021-10-26 |
| 11107899 | Plate design to decrease noise in semiconductor devices | Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang | 2021-08-31 |
| 11088085 | Layout to reduce noise in semiconductor devices | Fu-Yu Chu, Ruey-Hsin Liu | 2021-08-10 |
| 11069805 | Embedded JFETs for high voltage applications | Jen-Hao Yeh, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen, Fu-Chih Yang +1 more | 2021-07-20 |
| 11011610 | Plate design to decrease noise in semiconductor devices | Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang | 2021-05-18 |
| 10957772 | Semiconductor device having multiple wells | Fu-Yu Chu, Ruey-Hsin Liu | 2021-03-23 |
| 10714432 | Layout to reduce noise in semiconductor devices | Fu-Yu Chu, Ruey-Hsin Liu | 2020-07-14 |
| 10686032 | High voltage resistor with high voltage junction termination | Ru-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Ruey-Hsin Liu | 2020-06-16 |
| 10658482 | Plate design to decrease noise in semiconductor devices | Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang | 2020-05-19 |
| 10510882 | Embedded JFETs for high voltage applications | Jen-Hao Yeh, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen, Fu-Chih Yang +1 more | 2019-12-17 |
| 10497795 | Triple well isolated diode and method of making | Fu-Yu Chu, Ruey-Hsin Liu | 2019-12-03 |
| 10205024 | Semiconductor structure having field plate and associated fabricating method | Fu-Yu Chu, Ruey-Hsin Liu, Kuang-Hsin Chen, Chih-Hsin Ko, Shih-Fen Huang | 2019-02-12 |
| 10121890 | High voltage transistor structure | Ker Hsiao Huo, Ru-Yi Su, Jen-Hao Yeh, Fu-Chih Yang, Chun Lin Tsai | 2018-11-06 |
| 10103223 | High voltage resistor with pin diode isolation | Ru-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Ruey-Hsin Liu | 2018-10-16 |
| 10038090 | Power MOSFETs and methods for forming the same | Fu-Yu Chu, Tung-Yang Lin, Ruey-Hsin Liu | 2018-07-31 |
| 9917212 | JFET structure and manufacturing method of the same | Fu-Yu Chu, Ruey-Hsin Liu | 2018-03-13 |
| 9917168 | Metal oxide semiconductor field effect transistor having variable thickness gate dielectric | Fu-Yu Chu, Ruey-Hsin Liu | 2018-03-13 |