Issued Patents All Time
Showing 376–400 of 458 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8524570 | Method and apparatus for improving gate contact | Chih-Yang Yeh, Bao-Ru Young, Yuh-Jier Mii | 2013-09-03 |
| 8497169 | Method for protecting a gate structure during contact formation | Hong-Dyi Chang, Pei-Chao Su, Kong-Beng Thei, Hun-Jan Tao | 2013-07-30 |
| 8476126 | Gate stack for high-K/metal gate last process | Kong-Beng Thei, Chiung-Han Yeh | 2013-07-02 |
| 8461654 | Spacer shape engineering for void-free gap-filling process | Ming-Yuan Wu, Yi-Shien Mor, Chih-Tang Peng, Chiung-Han Yeh, Kong-Beng Thei +1 more | 2013-06-11 |
| 8461629 | Semiconductor device and method of fabricating same | Chung Long Cheng, Sheng-Chen Chung, Kong-Beng Thei, Mong-Song Liang | 2013-06-11 |
| 8461621 | Method and apparatus of forming bipolar transistor device | Lee-Wee Teo, Ming Zhu | 2013-06-11 |
| 8450834 | Spacer structure of a field effect transistor with an oxygen-containing layer between two oxygen-sealing layers | Jin-Aun Ng, Bao-Ru Young, Ryan Chia-Jen Chen | 2013-05-28 |
| 8450161 | Method of fabricating a sealing structure for high-k metal gate | Chien-Hao Chen, Hao-Ming Lien, Ssu-Yu Li, Jun-Lin Yeh, Kang-Cheng Lin +8 more | 2013-05-28 |
| 8450216 | Contact etch stop layers of a field effect transistor | Lee-Wee Teo, Ming Zhu, Bao-Ru Young | 2013-05-28 |
| 8394692 | Integrating a first contact structure in a gate last process | Chiung-Han Yeh, Ming-Yuan Wu, Kong-Beng Thei, Mong-Song Liang | 2013-03-12 |
| 8390072 | Chemical mechanical polishing (CMP) method for gate last process | Kong-Beng Thei, Su-Chen Lai, Gary Shen | 2013-03-05 |
| 8389359 | Method for forming low resistance and uniform metal gate | Lee-Wee Teo | 2013-03-05 |
| 8378428 | Metal gate structure of a semiconductor device | Han-Guan Chew, Lee-Wee Teo, Ming Zhu, Bao-Ru Young | 2013-02-19 |
| 8372706 | Semiconductor device fabrication method including hard mask and sacrificial spacer elements | Shun-Jang Liao, Sheng-Chen Chung, Kong-Beng Thei | 2013-02-12 |
| 8373199 | Semiconductor device having a SiGe feature and a metal gate stack | Jin-Aun Ng, Wen-Chin Yang, Chien-Liang Chen, Chung-Hua Fei, Maxi Chang +1 more | 2013-02-12 |
| 8367515 | Hybrid shallow trench isolation for high-k metal gate device improvement | Chung Long Cheng, Kong-Beng Thei | 2013-02-05 |
| 8368136 | Integrating a capacitor in a metal gate last process | Tzung-Chi Lee, Kong-Beng Thei, Sheng-Chen Chung, Mong-Song Liang | 2013-02-05 |
| 8368170 | Reducing device performance drift caused by large spacings between active regions | Kong-Beng Thei, Mong-Song Liang | 2013-02-05 |
| 8361866 | Modifying work function in PMOS devices by counter-doping | Chun-Yi Lee, Ping-Wei Wang, Kong-Beng Thei | 2013-01-29 |
| 8349680 | High-k metal gate CMOS patterning method | Kong-Beng Thei, Ryan Chia-Jen Chen, Su-Chen Lai, Yi-Shien Mor, Yi-Hsing Chen +2 more | 2013-01-08 |
| 8349732 | Implanted metal silicide for semiconductor device | Hung-Chih Tsai, Keh-Chiang Ku, Kong-Beng Thei, Mong-Song Liang | 2013-01-08 |
| 8349678 | Laterally diffused metal oxide semiconductor transistor with partially unsilicided source/drain | Lee-Wee Teo, Ming Zhu | 2013-01-08 |
| 8343867 | Method for main spacer trim-back | Jin-Aun Ng, Yu-Ying Hsu, Chi-Ju Lee, Sin-Hua Wu, Bao-Ru Young | 2013-01-01 |
| 8334572 | Resistive device for high-k metal gate technology | Sheng-Chen Chung, Kong-Beng Thei | 2012-12-18 |
| 8329521 | Method and device with gate structure formed over the recessed top portion of the isolation structure | Bao-Ru Young, Sheng-Chen Chung, Kai-Shyang You, Jin-Aun Ng, Wei-Cheng Wu +1 more | 2012-12-11 |