Issued Patents All Time
Showing 351–375 of 458 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8765600 | Contact structure for reducing gate resistance and method of making the same | Chung-Long Chang, Chih-Ping Chao, Chun-Hung Chen, Hua-Chao Tseng, Jye-Yen Cheng | 2014-07-01 |
| 8754470 | Vertical tunneling field-effect transistor cell and fabricating the same | Cheng-Cheng Kuo, Ming Zhu | 2014-06-17 |
| 8735235 | Integrated circuit metal gate structure and method of fabrication | Kong-Beng Thei, Chiung-Han Yeh, Ming-Yuan Wu, Mong-Song Liang | 2014-05-27 |
| 8728900 | Integrating the formation of I/O and core MOS devices with MOS capacitors and resistors | Mong-Song Liang, Wen-Chih Yang, Chien-Liang Chen, Chii-Horng Li | 2014-05-20 |
| 8716103 | Semiconductor device and method of fabricating same | Chung Long Cheng, Sheng-Chen Chung, Kong-Beng Thei, Mong-Song Liang | 2014-05-06 |
| 8697517 | Reduced substrate coupling for inductors in semiconductor devices | Ming Zhu, Lee-Wee Teo | 2014-04-15 |
| 8680619 | Method of fabricating hybrid impact-ionization semiconductor device | Ming Zhu, Lee-Wee Teo | 2014-03-25 |
| 8680597 | Method and apparatus for improving gate contact | Chih-Yang Yeh, Bao-Ru Young, Yuh-Jier Mii | 2014-03-25 |
| 8669153 | Integrating a first contact structure in a gate last process | Chiung-Han Yeh, Ming-Yuan Wu, Kong-Beng Thei, Mong-Song Liang | 2014-03-11 |
| 8664079 | Method of fabricating semiconductor device by thinning hardmask layers on frontside and backside of substrate | Han-Guan Chew, Ming Zhu, Lee-Wee Teo | 2014-03-04 |
| 8648446 | Method for protecting a gate structure during contact formation | Hong-Dyi Chang, Pei-Chao Su, Kong-Beng Thei, Hun-Jan Tao | 2014-02-11 |
| 8629050 | E-fuse structure design in electrical programmable redundancy for embedded memory circuit | Kong-Beng Thei, Chung Long Cheng, Chung-Shi Liu, Shien-Yang Wu, Shi-Bai Chen | 2014-01-14 |
| 8629515 | Metal gate semiconductor device | Ching-Han Yeh, Chen-Pin Hsu, Ming-Yuan Wu, Kong-Beng Thei | 2014-01-14 |
| 8624295 | SRAM devices utilizing strained-channel transistors and methods of manufacture | Hung-Chih Tsai, Kong-Beng Thei, Mong-Song Liang | 2014-01-07 |
| 8614484 | High voltage device with partial silicon germanium epi source/drain | Lee-Wee Teo, Ming Zhu | 2013-12-24 |
| 8609484 | Method for forming high-K metal gate device | Lee-Wee Tao, Han-Guan Chew, Syun-Ming Jang | 2013-12-17 |
| 8598656 | Method and apparatus of forming ESD protection device | Ming Zhu, Lee-Wee Teo | 2013-12-03 |
| 8598630 | Photo alignment mark for a gate last process | Gary Shen, Ming-Yuan Wu, Chiung-Han Yeh, Kong-Beng Thei | 2013-12-03 |
| 8586428 | Interconnection structure for N/P metal gates | Han-Guan Chew, Ming Zhu, Lee-Wee Teo | 2013-11-19 |
| 8587074 | Device having a gate stack | Ming-Hsiang Song, Kuo-Ji Chen, Ming Zhu, Po-Nien Chen, Bao-Ru Young | 2013-11-19 |
| 8563389 | Integrated circuit having silicon resistor and method of forming the same | Ming Zhu, Lee-Wee Teo, Bao-Ru Young | 2013-10-22 |
| 8557659 | Spacer structures of a semiconductor device | Lee-Wee Teo, Ming Zhu, Hui-Wen Lin, Bao-Ru Young | 2013-10-15 |
| 8558278 | Strained transistor with optimized drive current and method of forming | Kong-Beng Thei, Wen-Huei Guo, Mong-Song Liang | 2013-10-15 |
| 8552522 | Dishing-free gap-filling with multiple CMPs | Ming-Yuan Wu, Kong-Beng Thei, Chiung-Han Yeh, Mong-Song Liang | 2013-10-08 |
| 8525270 | Structures and methods to stop contact metal from extruding into replacement gates | Lee-Wee Teo, Ming Zhu, Chi-Ju Lee, Sheng-Chen Chung, Kai-Shyang You | 2013-09-03 |