Issued Patents All Time
Showing 126–150 of 192 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8354297 | Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die | Seng Guan Chow, Seung Uk Yoon | 2013-01-15 |
| 8349735 | Semiconductor device and method of forming conductive TSV with insulating annular ring | Byung Tai Do, Nathapong Suthiwongsunthorn | 2013-01-08 |
| 8349657 | Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices | Byung Tai Do, Linda Pei Ee Chua | 2013-01-08 |
| 8334171 | Package system with a shielded inverted internal stacking module and method of manufacture thereof | Zigmund Ramirez Camacho, Henry Descalzo Bathan | 2012-12-18 |
| 8334169 | Integrated circuit packaging system and method of manufacture thereof | Byung Tai Do, Linda Pei Ee Chua | 2012-12-18 |
| 8304286 | Integrated circuit packaging system with shielded package and method of manufacture thereof | Dioscoro A. Merilo, Shuangwu Huang | 2012-11-06 |
| 8304277 | Semiconductor device and method of forming base substrate with cavities formed through etch-resistant conductive layer for bump locking | — | 2012-11-06 |
| 8288201 | Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor die | Yaojian Lin, Jun Mo Koo | 2012-10-16 |
| 8283205 | Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die | Byung Tai Do, Linda Pei Ee Chua | 2012-10-09 |
| 8278141 | Integrated circuit package system with internal stacking module | Seng Guan Chow, Heap Hoe Kuan | 2012-10-02 |
| 8270176 | Exposed interconnect for a package on package system | Byung Tai Do, Linda Pei Ee Chua | 2012-09-18 |
| 8268677 | Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer | — | 2012-09-18 |
| 8264080 | Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structure | — | 2012-09-11 |
| 8263434 | Semiconductor device and method of mounting die with TSV in cavity of substrate for electrical interconnect of Fi-PoP | Heap Hoe Kuan, Dioscoro A. Merilo | 2012-09-11 |
| 8258012 | Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die | Jose Alvin Caparas, Pandi C. Marimuthu | 2012-09-04 |
| 8258010 | Making a semiconductor device having conductive through organic vias | Byung Tai Do, Shuangwu Huang | 2012-09-04 |
| 8241955 | Integrated circuit packaging system with mountable inward and outward interconnects and method of manufacture thereof | Byung Tai Do, Jong-Woo Ha | 2012-08-14 |
| 8241964 | Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation | Yaojian Lin, Jun Mo Koo | 2012-08-14 |
| 8236617 | Semiconductor device and method of forming thermally conductive layer between semiconductor die and build-up interconnect structure | Yaojian Lin, Jun Mo Koo | 2012-08-07 |
| 8237252 | Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation | Byung Tai Do, Linda Pei Ee Chua | 2012-08-07 |
| 8227910 | Apparatus for thermally enhanced semiconductor package | Byung Tai Do, Zigmund Ramirez Camacho | 2012-07-24 |
| 8193610 | Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP | Byung Tai Do | 2012-06-05 |
| 8193034 | Semiconductor device and method of forming vertical interconnect structure using stud bumps | Byung Tai Do, Shuangwu Huang, Rajendra D. Pendse | 2012-06-05 |
| 8169058 | Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars | Byung Tai Do, Linda Pei Ee Chua | 2012-05-01 |
| 8168458 | Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices | Byung Tai Do, Linda Pei Ee Chua | 2012-05-01 |