HL

Hun Teak Lee

SC Stats Chippac: 20 patents #58 of 425Top 15%
CH Chippac: 5 patents #4 of 42Top 10%
Overall (All Time): #162,933 of 4,157,543Top 4%
25
Patents All Time

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDate
11145603 Integrated circuit packaging system with shielding and method of manufacture thereof Byung Joon Han, Il Kwon Shim, KyoungHee Park, Yaojian Lin, KyoWang Koo +5 more 2021-10-12
11024585 Integrated circuit packaging system with shielding and method of manufacture thereof Byung Joon Han, Il Kwon Shim, KyoungHee Park, Yaojian Lin, KyoWang Koo +5 more 2021-06-01
9997468 Integrated circuit packaging system with shielding and method of manufacturing thereof Byung Joon Han, Il Kwon Shim, KyoungHee Park, Yaojian Lin, KyoWang Koo +5 more 2018-06-12
9693455 Integrated circuit packaging system with plated copper posts and method of manufacture thereof Seong Won Park, WoonJae Beak, Minjung Kim, Changhwan Kim, ByungHyun Kwak +2 more 2017-06-27
9385100 Integrated circuit packaging system with surface treatment and method of manufacture thereof YoungChul Kim, Hyunll Bae, HeeSoo Lee, HeeJo Chi 2016-07-05
9129826 Epoxy bump for overhang die Jong Kook Kim, Chul-Sik Kim, Ki Youn Jang 2015-09-08
9093278 Method of manufacture of integrated circuit packaging system with plasma processing JoonYoung Choi, Seong Won Park, KyungOe Kim, SungWon Cho 2015-07-28
8729687 Stackable integrated circuit package system Tae Keun Lee, Soo Jung Park 2014-05-20
8716108 Integrated circuit packaging system with ultra-thin chip and method of manufacture thereof DaeWook Yang, Yeongbeom Ko 2014-05-06
8519517 Semiconductor system with fine pitch lead fingers and method of manufacturing thereof Jong Kook Kim, ChulSik Kim, Ki Youn Jang 2013-08-27
8410594 Inter-stacking module system Kwang Soon Hwang, Youngcheol Kim, Koo Hong Lee 2013-04-02
8304874 Stackable integrated circuit package system Tae Keun Lee, Soo Jung Park 2012-11-06
8269356 Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates Rajendra D. Pendse, Byung Joon Han 2012-09-18
8256660 Semiconductor package system with fine pitch lead fingers and method of manufacturing thereof Jong Kook Kim, ChulSik Kim, Ki Youn Jang 2012-09-04
8129263 Wire bond interconnection and method of manufacture thereof Jong Kook Kim, Chul-Sik Kim, Ki Youn Jang, Rajendra D. Pendse 2012-03-06
7986047 Wire bond interconnection Jong Kook Kim, Chul-Sik Kim, Ki Youn Jang, Rajendra D. Pendse 2011-07-26
7909233 Method of manufacturing a semiconductor package with fine pitch lead fingers Jong Kook Kim, ChulSik Kim, Ki Youn Jang 2011-03-22
7863737 Integrated circuit package system with wire bond pattern Byoung Wook Jang, Kwang Soon Hwang 2011-01-04
7759783 Integrated circuit package system employing thin profile techniques Tae Keun Lee, Soo Jung Park 2010-07-20
7745322 Wire bond interconnection Jong Kook Kim, Chul-Sik Kim, Ki Youn Jang, Rajendra D. Pendse 2010-06-29
7731078 Semiconductor system with fine pitch lead fingers Jong Kook Kim, ChulSik Kim, Ki Youn Jang 2010-06-08
7652382 Micro chip-scale-package system Jong Kook Kim, Jason Lee 2010-01-26
7453156 Wire bond interconnection Jong Kook Kim, Chul-Sik Kim, Ki Youn Jang, Rajendra D. Pendse 2008-11-18
7407080 Wire bond capillary tip Kenny Lee, Jong Kook Kim, ChulSik Kim, Ki Youn Jang 2008-08-05
7298052 Micro chip-scale-package system Jong Kook Kim, Jason Lee 2007-11-20