Issued Patents All Time
Showing 76–100 of 244 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9929174 | Three-dimensional memory device having non-uniform spacing among memory stack structures and method of making thereof | Yuki Mizutani, Fumiaki Toyama, Masaaki Higashitani, Fumitaka Amano, Kota Funayama +1 more | 2018-03-27 |
| 9911748 | Epitaxial source region for uniform threshold voltage of vertical transistors in 3D memory devices | Masatoshi Nishikawa, Kiyohiko Sakakibara, Shuji Minagawa | 2018-03-06 |
| 9899399 | 3D NAND device with five-folded memory stack structure configuration | Hiroyuki Tanaka | 2018-02-20 |
| 9887240 | Method of fabricating memory array having divided apart bit lines and partially divided bit line selector switches | Seiji Shimabukuro, Teruyuki Mine, Naoki Takeguchi | 2018-02-06 |
| 9876031 | Three-dimensional memory device having passive devices at a buried source line level and method of making thereof | Satoshi Shimizu, Yasuo Kasagi, Kento KITAMURA | 2018-01-23 |
| 9876027 | Three dimensional NAND device with channel located on three sides of lower select gate and method of making thereof | Shinsuke Yada | 2018-01-23 |
| 9870493 | Antenna loop configuration for more efficiently surrounding the high intensity area of the magnetic field produced by an IC card | Yuhji Yashiro, Yasuhiro Sugita | 2018-01-16 |
| 9870111 | Touchscreen panel with driving electrodes connected to a plurality of lead lines extending in parallel to sensing electrodes | Yasuhiro Sugita, Kenshi Tada, Yuuichi Kanbayashi, Shinji Yamagishi | 2018-01-16 |
| 9864457 | Display device with touch sensor | Kenshi Tada, Yasuhiro Sugita, Shinji Yamagishi, Jean Mugiraneza | 2018-01-09 |
| 9842754 | Substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer-readable recording medium | Akira Takahashi, Takeshi Yasui, Kazuya NABETA, Naoya Matsuura | 2017-12-12 |
| 9818759 | Through-memory-level via structures for a three-dimensional memory device | James Kai, Jin Liu, Johann Alsmeier, Jixin Yu, Yoko Furihata | 2017-11-14 |
| 9818693 | Through-memory-level via structures for a three-dimensional memory device | Fumiaki Toyama, Yoko Furihata, James Kai, Yuki Mizutani, Jixin Yu +2 more | 2017-11-14 |
| 9811216 | Display device, portable terminal, monitor, television, and method for controlling display device | Yasuhiro Sugita, Tomohiro Kimura, Shinji Yamagishi, Kohji Fujiwara | 2017-11-07 |
| 9806093 | Through-memory-level via structures for a three-dimensional memory device | Fumiaki Toyama, Yuki Mizutani | 2017-10-31 |
| 9768186 | Three dimensional memory device having well contact pillar and method of making thereof | Seiji Shimabukuro, Ryoichi Honma, Yuki Mizutani, Fumiaki Toyama | 2017-09-19 |
| 9721663 | Word line decoder circuitry under a three-dimensional memory array | Fumiaki Toyama, Takuya Ariki | 2017-08-01 |
| 9716062 | Multilevel interconnect structure and methods of manufacturing the same | Shinsuke Yada | 2017-07-25 |
| 9714697 | Stepless transmission | Akira Hibino, Yuki Aratsu | 2017-07-25 |
| 9711524 | Three-dimensional memory device containing plural select gate transistors having different characteristics and method of making thereof | Go Shoji | 2017-07-18 |
| 9691781 | Vertical resistor in 3D memory device with two-tier stack | Masatoshi Nishikawa, Kota Funayama, Toru Miwa | 2017-06-27 |
| 9608043 | Method of operating memory array having divided apart bit lines and partially divided bit line selector switches | Seiji Shimabukuro, Teruyuki Mine, Naoki Takeguchi | 2017-03-28 |
| 9601508 | Blocking oxide in memory opening integration scheme for three-dimensional memory structure | Jongsun Sel, Chan Park, Atsushi Suyama, Frank Yu, Ryoichi Honma +6 more | 2017-03-21 |
| 9595535 | Integration of word line switches with word line contact via structures | Makoto Yoshida, Kazutaka Yoshizawa, Takuya Ariki, Toru Miwa | 2017-03-14 |
| 9590827 | Distortion compensation apparatus, wireless communication system, and distortion compensation method | Yoshinobu Shizawa, Hiroaki Maeda, Junya Morita, Yousuke Okazaki, Satoshi Matsubara | 2017-03-07 |
| 9589839 | Method of reducing control gate electrode curvature in three-dimensional memory devices | Yusuke Ikawa, Kiyohiko Sakakibara, Eisuke Takii, Kengo Kajiwara, Seiji Shimabukuro +1 more | 2017-03-07 |