Issued Patents All Time
Showing 1–25 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11631691 | Three-dimensional flat memory device including a dual dipole blocking dielectric layer and methods of making the same | Kiyohiko Sakakibara | 2023-04-18 |
| 11587943 | Bonded die assembly using a face-to-back oxide bonding and methods for making the same | Akio Nishida | 2023-02-21 |
| 11487454 | Systems and methods for defining memory sub-blocks | Hardwell Chibvongodze | 2022-11-01 |
| 11404122 | Sub-block size reduction for 3D non-volatile memory | Hardwell Chibvongodze | 2022-08-02 |
| 11222954 | Three-dimensional memory device containing inter-select-gate electrodes and methods of making the same | Zhixin Cui, Hardwell Chibvongodze | 2022-01-11 |
| 11189335 | Double write/read throughput by CMOS adjacent array (CaA) NAND memory | Hardwell Chibvongodze, Ken Oowada | 2021-11-30 |
| 11094715 | Three-dimensional memory device including different height memory stack structures and methods of making the same | Zhixin Cui, Ken Oowada | 2021-08-17 |
| 11081185 | Non-volatile memory array driven from both sides for performance improvement | Hardwell Chibvongodze | 2021-08-03 |
| 11043537 | Three-dimensional phase change memory device including vertically constricted current paths and methods of manufacturing the same | Yuji Takahashi, Wei-Kuo Shih | 2021-06-22 |
| 11024635 | Three-dimensional flat NAND memory device having curved memory elements and methods of making the same | Zhixin Cui, Yanli Zhang | 2021-06-01 |
| 11024385 | Parallel memory operations in multi-bonded memory device | Hardwell Chibvongodze | 2021-06-01 |
| 10991705 | Three-dimensional memory device having enhanced contact between polycrystalline channel and epitaxial pedestal structure and method of making the same | Jayavel Pachamuthu | 2021-04-27 |
| 10991706 | Three-dimensional memory device having enhanced contact between polycrystalline channel and epitaxial pedestal structure and method of making the same | Jayavel Pachamuthu | 2021-04-27 |
| 10964752 | Three-dimensional memory device including laterally constricted current paths and methods of manufacturing the same | Yuji Takahashi, Wei-Kuo Shih | 2021-03-30 |
| 10930674 | Three-dimensional flat NAND memory device having curved memory elements and methods of making the same | Zhixin Cui, Yanli Zhang | 2021-02-23 |
| 10878907 | Sub-block size reduction for 3D non-volatile memory | Hardwell Chibvongodze | 2020-12-29 |
| 10854619 | Three-dimensional memory device containing bit line switches | Hardwell Chibvongodze, Naoki Ookuma, Takuya Ariki, Toru Miwa | 2020-12-01 |
| 10839918 | Boost converter in memory chip | Hardwell Chibvongodze | 2020-11-17 |
| 10797062 | Bonded die assembly using a face-to-back oxide bonding and methods for making the same | Akio Nishida | 2020-10-06 |
| 10756106 | Three-dimensional memory device with locally modulated threshold voltages at drain select levels and methods of making the same | Michiaki Sano, Ken Oowada, Zhixin Cui | 2020-08-25 |
| 10741535 | Bonded assembly containing multiple memory dies sharing peripheral circuitry on a support die and methods for making the same | Hardwell Chibvongodze | 2020-08-11 |
| 10741576 | Three-dimensional memory device containing drain-select-level air gap and methods of making the same | Akio Nishida | 2020-08-11 |
| 10741579 | Three-dimensional memory device including different height memory stack structures and methods of making the same | Zhixin Cui, Ken Oowada | 2020-08-11 |
| 10734080 | Three-dimensional memory device containing bit line switches | Hardwell Chibvongodze, Naoki Ookuma, Takuya Ariki, Toru Miwa | 2020-08-04 |
| 10720444 | Three-dimensional flat memory device including a dual dipole blocking dielectric layer and methods of making the same | Kiyohiko Sakakibara | 2020-07-21 |