Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11177277 | Word line architecture for three dimensional NAND flash memory | Hiroki Yabe, Koichiro Hayashi, Takuya Ariki, Toru Miwa | 2021-11-16 |
| 11081192 | Memory plane structure for ultra-low read latency applications in non-volatile memories | Hiroki Yabe, Koichiro Hayashi, Takuya Ariki, Yuki Fujita, Kazuki Yamauchi +2 more | 2021-08-03 |
| 10984874 | Differential dbus scheme for low-latency random read for NAND memories | Hiroki Yabe, Koichiro Hayashi, Takuya Ariki, Toru Miwa | 2021-04-20 |
| 10885984 | Area effective erase voltage isolation in NAND memory | Hiroki Yabe, Koichiro Hayashi, Takuya Ariki, Yuki Fujita, Kazuki Yamauchi +2 more | 2021-01-05 |
| 10854619 | Three-dimensional memory device containing bit line switches | Hardwell Chibvongodze, Masatoshi Nishikawa, Takuya Ariki, Toru Miwa | 2020-12-01 |
| 10734080 | Three-dimensional memory device containing bit line switches | Hardwell Chibvongodze, Masatoshi Nishikawa, Takuya Ariki, Toru Miwa | 2020-08-04 |
| 9852078 | Data mapping for non-volatile storage | Shingo Zaitsu, Yosuke Kato | 2017-12-26 |
| 8526229 | Semiconductor memory device | Hiroyuki Takahashi | 2013-09-03 |
| 8284598 | Semiconductor memory device | Hiroyuki Takahashi | 2012-10-09 |