KK

Kengo Kajiwara

ST Sandisk Technologies: 11 patents #258 of 2,224Top 15%
📍 Yokkaichi, JP: #351 of 2,072 inventorsTop 20%
Overall (All Time): #439,404 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
12408345 Three-dimensional memory device with backside support pillar structures and methods of forming the same Shunsuke TAKUMA, Yuji Totoki, Seiji Shimabukuro, Tatsuya Hinoue, Akihiro Tobioka 2025-09-02
11844222 Three-dimensional memory device with backside support pillar structures and methods of forming the same Shunsuke TAKUMA, Yuji Totoki, Seiji Shimabukuro, Tatsuya Hinoue, Akihiro Tobioka 2023-12-12
11637118 Three-dimensional memory device containing auxiliary support pillar structures and method of making the same Shunsuke TAKUMA, Seiji Shimabukuro 2023-04-25
11637119 Three-dimensional memory device containing auxiliary support pillar structures and method of making the same Kohei Yamaguchi, Keisuke SHIGEMURA 2023-04-25
11398497 Three-dimensional memory device containing auxiliary support pillar structures and method of making the same Atsushi Shimoda, Tatsuya Hinoue, Junpei Kanazawa, Masanori Terahara 2022-07-26
11018152 Method for etching bottom punch-through opening in a memory film of a multi-tier three-dimensional memory device Tatsuya Hinoue, Ryousuke Itou, Naohiro Hosoda 2021-05-25
10804197 Memory die containing stress reducing backside contact via structures and method of making the same Motoki KAWASAKI, Arata Okuyama, Xun Gu, Jixin Yu 2020-10-13
9991277 Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof Masanori Tsutsumi, Raghuveer S. Makala 2018-06-05
9754999 Vertical thin film transistors with surround gates Seje Takaki, Manabu Hayashi, Ryousuke Itou, Takuro Maede, Tetsuya Yamada +1 more 2017-09-05
9673257 Vertical thin film transistors with surround gates Seje Takaki, Manabu Hayashi, Akira Nakada, Ryousuke Itou, Takuro Maede +1 more 2017-06-06
9589839 Method of reducing control gate electrode curvature in three-dimensional memory devices Yusuke Ikawa, Kiyohiko Sakakibara, Eisuke Takii, Seiji Shimabukuro, Akira Matsudaira +1 more 2017-03-07