MT

Masanori Terahara

FL Fujitsu Semiconductor Limited: 9 patents #48 of 1,301Top 4%
ST Sandisk Technologies: 9 patents #324 of 2,224Top 15%
Fujitsu Limited: 4 patents #7,093 of 24,456Top 30%
FL Fujitsu Microelectronics Limited: 3 patents #51 of 624Top 9%
📍 Yokkaichi, JP: #143 of 2,072 inventorsTop 7%
Overall (All Time): #162,300 of 4,157,543Top 4%
25
Patents All Time

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDate
11398497 Three-dimensional memory device containing auxiliary support pillar structures and method of making the same Kengo Kajiwara, Atsushi Shimoda, Tatsuya Hinoue, Junpei Kanazawa 2022-07-26
11282783 Three-dimensional memory device with via structures surrounded by perforated dielectric moat structure and methods of making the same Yoshitaka Otsu, Junpei Kanazawa 2022-03-22
10872857 Three-dimensional memory device containing through-array contact via structures between dielectric barrier walls and methods of making the same Yoshitaka Otsu, Kei Nozawa, Naoto Hojo, Hirofumi TOKITA, Eiji Hayashi 2020-12-22
10014316 Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof Fabo Yu, Jayavel Pachamuthu, Jongsun Sel, Tuan Pham, Cheng-Chung Chu +3 more 2018-07-03
9548313 Method of making a monolithic three dimensional NAND string using a select gate etch stop layer Shinsuke Yada, Shigehiro Fujino, Hajime Kimura, Ryoichi Honma, Hiroyuki Ogawa +1 more 2017-01-17
9530788 Metallic etch stop layer in a three-dimensional memory structure Tomohiro Oginoe, Ryoichi Honma 2016-12-27
9437606 Method of making a three-dimensional memory array with etch stop Raghuveer S. Makala, Johann Alsmeier, Yao-Sheng Lee, Hirofumi Watatani, Jayavel Pachamuthu 2016-09-06
9117675 Semiconductor device production method Junji Oh 2015-08-25
9099496 Method of forming an active area with floating gate negative offset profile in FG NAND memory Ming Tian, Jayavel Pachamuthu, Atsushi Suyama, James Kai, Raghuveer S. Makala +4 more 2015-08-04
9093480 Spacer passivation for high aspect ratio etching of multilayer stacks for three dimensional NAND device Raghuveer S. Makala, Yao-Sheng Lee, Johann Alsmeier, Henry Chien, Hirofumi Watatani 2015-07-28
8847282 Semiconductor device and fabrication method Masaki Haneda, Yuka Kase, Takayuki Aoyama 2014-09-30
8835327 Method of manufacturing semiconductor device Hikaru Kokura, Akihiro Hasegawa, Atsuo Fushida, Fumihiko Akaboshi 2014-09-16
8709896 Semiconductor device and fabrication method Masaki Haneda, Yuka Kase, Takayuki Aoyama 2014-04-29
8273630 Method for manufacturing semiconductor device Takayuki Wada, Junji Oh 2012-09-25
8193048 Semiconductor device and method of manufacturing a semiconductor device Masato Miyamoto 2012-06-05
8043917 Method for manufacturing semiconductor device Takayuki Wada, Junji Oh 2011-10-25
8039358 Method of manufacturing semiconductor device on which a plurality of types of transistors are mounted Masaki Nakagawa 2011-10-18
7951686 Method of manufacturing semiconductor device having device characteristics improved by straining surface of active region Sadahiro Kishii, Hirofumi Watatani, Ryo Tanabe, Kaina Suzuki, Shigeo Satoh 2011-05-31
7947567 Method of fabricating a semiconductor device with reduced oxide film variation Junji Oh 2011-05-24
7846792 Method for manufacturing semiconductor device and semiconductor device manufacturing system 2010-12-07
7701016 Semiconductor device having device characteristics improved by straining surface of active region and its manufacture method Sadahiro Kishii, Hirofumi Watatani, Ryo Tanabe, Kaina Suzuki, Shigeo Satoh 2010-04-20
7601576 Method for fabricating semiconductor device Rintaro Suzuki, Hiroshi Morioka 2009-10-13
7541120 Manufacturing method of semiconductor device 2009-06-02
7501686 Semiconductor device and method for manufacturing the same Masaki Okuno, Sadahiro Kishii, Hiroshi Morioka, Shigeo Satoh, Kaina Suzuki 2009-03-10
6979610 Semiconductor device fabrication method Hiroshi Morioka 2005-12-27