Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10707314 | Surround gate vertical field effect transistors including tubular and strip electrodes and method of making the same | Jongsun Sel, Hisakazu Otoi, Chao Feng Yeh | 2020-07-07 |
| 10541273 | Vertical thin film transistors with isolation | — | 2020-01-21 |
| 10283710 | Resistive random access memory device containing replacement word lines and method of making thereof | Shin Kikuchi | 2019-05-07 |
| 10115895 | Vertical field effect transisitors having a rectangular surround gate and method of making the same | Jongsun Sel, Hisakazu Otoi | 2018-10-30 |
| 10096654 | Three-dimensional resistive random access memory containing self-aligned memory elements | Shin Kikuchi, Kazushi Komeda, Takuya Futase, Teruyuki Mine, Eiji Hayashi +1 more | 2018-10-09 |
| 9754999 | Vertical thin film transistors with surround gates | Manabu Hayashi, Ryousuke Itou, Takuro Maede, Kengo Kajiwara, Tetsuya Yamada +1 more | 2017-09-05 |
| 9748172 | Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines | — | 2017-08-29 |
| 9698202 | Parallel bit line three-dimensional resistive random access memory | — | 2017-07-04 |
| 9673257 | Vertical thin film transistors with surround gates | Manabu Hayashi, Akira Nakada, Ryousuke Itou, Takuro Maede, Kengo Kajiwara +1 more | 2017-06-06 |
| 9646880 | Monolithic three dimensional memory arrays formed using sacrificial polysilicon pillars | Teruyuki Mine | 2017-05-09 |
| 9613689 | Self-selecting local bit line for a three-dimensional memory array | — | 2017-04-04 |
| 9595566 | Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines | — | 2017-03-14 |
| 9583539 | Word line connection for memory device and method of making thereof | — | 2017-02-28 |
| 9530824 | Monolithic three dimensional memory arrays with staggered vertical bit line select transistors and methods therfor | Yoshio Mori | 2016-12-27 |
| 9515023 | Multilevel contact to a 3D memory array and method of making thereof | Toshihide Tobitsuka | 2016-12-06 |
| 9449924 | Multilevel contact to a 3D memory array and method of making thereof | — | 2016-09-20 |
| 9419058 | Memory device with comb-shaped electrode having a plurality of electrode fingers and method of making thereof | Yoshihiro Sato | 2016-08-16 |
| 9343507 | Dual channel vertical field effect transistor including an embedded electrode | — | 2016-05-17 |
| 9331088 | Transistor device with gate bottom isolation and method of making thereof | — | 2016-05-03 |
| 9230905 | Trench multilevel contact to a 3D memory array and method of making thereof | Michiaki Sano, Zhen Chen | 2016-01-05 |