Issued Patents All Time
Showing 25 most recent of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11758831 | Low resistance multi-layer electrode for phase change memory and methods of making the same | Takashi Kobayashi | 2023-09-12 |
| 11721392 | Low resistance monosilicide electrode for phase change memory and methods of making the same | — | 2023-08-08 |
| 11424292 | Memory array containing capped aluminum access lines and method of making the same | — | 2022-08-23 |
| 11114157 | Low resistance monosilicide electrode for phase change memory and methods of making the same | — | 2021-09-07 |
| 10297312 | Resistive memory cell programmed by metal alloy formation and method of operating thereof | — | 2019-05-21 |
| 10096654 | Three-dimensional resistive random access memory containing self-aligned memory elements | Shin Kikuchi, Kazushi Komeda, Teruyuki Mine, Seje Takaki, Eiji Hayashi +1 more | 2018-10-09 |
| 9847249 | Buried etch stop layer for damascene bit line formation | Yuji Takahashi, Noritaka Fukuo, Katsuo Yamada, Tomoyasu Kakegawa | 2017-12-19 |
| 9799527 | Double trench isolation | Katsuo Yamada, Yuji Takahashi, Noritaka Fukuo, Tomoyasu Kakegawa | 2017-10-24 |
| 9768183 | Source line formation and structure | Shunsuke Akimoto, Hidetoshi Nakamoto, Keita Kumamoto, Hidehito Koseki, Yuji Takahashi +2 more | 2017-09-19 |
| 9607997 | Metal line with increased inter-metal breakdown voltage | Katsuo Yamada, Yuji Takahashi, Noritaka Fukuo, Masami Uozaki, Kiyokazu Shishido +1 more | 2017-03-28 |
| 9524904 | Early bit line air gap formation | Hiroto Ohori, Yuji Takahashi, Toshiyuki Sega, Kiyokazu Shishido, Kotaro Jinnouchi +1 more | 2016-12-20 |
| 9478461 | Conductive line structure with openings | Kiyokazu Shishido, Hiroto Ohori, Kotaro Jinnouchi, Noritaka Fukuo, Yuji Takahashi +1 more | 2016-10-25 |
| 9466523 | Contact hole collimation using etch-resistant walls | Tomoyasu Kakegawa, Katsuo Yamada, Keita Kumamoto, Hirotada Tobita | 2016-10-11 |
| 9443910 | Silicided bit line for reversible-resistivity memory | Kan Fujiwara, Toshihiro Iizuka, Shin Kikuchi, Yoichiro Tanaka, Akio Nishida +1 more | 2016-09-13 |
| 9401305 | Air gaps structures for damascene metal patterning | Yuji Takahashi, Yoko Furihata, Satoshi Kamata | 2016-07-26 |
| 9391081 | Metal indentation to increase inter-metal breakdown voltage | Kiyokazu Shishido, Noritaka Fukuo, Yuji Takahashi, Shunsuke Watanabe, Katsuo Yamada +1 more | 2016-07-12 |
| 9245898 | NAND flash memory integrated circuits and processes with controlled gate height | Eiichi Fujikura, Susumu Okazaki, Fumiaki Toyama, Hiroaki Koketsu | 2016-01-26 |
| 9177853 | Barrier layer stack for bit line air gap formation | Katsuo Yamada, Tomoyasu Kakegawa, Noritaka Fukuo, Yuji Takahashi | 2015-11-03 |
| 8541297 | Manufacturing method of semiconductor device | Tadashi Yamaguchi | 2013-09-24 |
| 8293648 | Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device | Tomonori Saeki, Mieko Kashi | 2012-10-23 |
| 8278199 | Method of manufacturing a semiconductor device | Shigenari Okada, Yutaka Inaba | 2012-10-02 |
| 8268682 | Method for manufacturing a semiconductor integrated circuit device | Shuhei Murata, Takeshi Hayashi | 2012-09-18 |
| 8222133 | Manufacturing method of semiconductor device | Takeshi Hayashi | 2012-07-17 |
| 8110457 | Method of manufacturing semiconductor device | — | 2012-02-07 |
| 8039378 | Method of manufacturing a semiconductor device | Shigenari Okada, Yutaka Inaba | 2011-10-18 |