Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12387789 | X-direction divided sub-block mode in NAND | Hiroyuki Ogawa | 2025-08-12 |
| 12354944 | Three-dimensional memory device containing plural metal oxide blocking dielectric layers and method of making thereof | Masanori Tsutsumi | 2025-07-08 |
| 11894298 | Three-dimensional memory device containing amorphous and crystalline blocking dielectric layers | Masanori Tsutsumi, Shuichi Hamaguchi, Kazuki Isozumi, Genta Mizuno, Yusuke Mukae +2 more | 2024-02-06 |
| 11417621 | Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same | Masanori Tsutsumi, Sayako Nagamine | 2022-08-16 |
| 11367733 | Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same | Masanori Tsutsumi, Kota Funayama | 2022-06-21 |
| 11289416 | Three-dimensional memory device containing amorphous and crystalline blocking dielectric layers | Masanori Tsutsumi, Shuichi Hamaguchi, Kazuki Isozumi, Genta Mizuno, Yusuke Mukae +2 more | 2022-03-29 |
| 11018152 | Method for etching bottom punch-through opening in a memory film of a multi-tier three-dimensional memory device | Tatsuya Hinoue, Kengo Kajiwara, Ryousuke Itou | 2021-05-25 |
| 11011506 | Bonded structure including a performance-optimized support chip and a stress-optimized three-dimensional memory chip and method for making the same | Kazuma Shimamoto, Tetsuya Shirasu, Yuji Fukano, Akio Nishida | 2021-05-18 |
| 10903237 | Three-dimensional memory device including stepped connection plates and methods of forming the same | Hiroyuki Ogawa, Yuki Mizutani | 2021-01-26 |
| 10665580 | Bonded structure including a performance-optimized support chip and a stress-optimized three-dimensional memory chip and method for making the same | Kazuma Shimamoto, Tetsuya Shirasu, Yuji Fukano, Akio Nishida | 2020-05-26 |
| 10453798 | Three-dimensional memory device with gated contact via structures and method of making thereof | Masanori Tsutsumi | 2019-10-22 |
| 10347647 | Three-dimensional memory device containing multi-threshold-voltage drain select gates and method of making the same | Keisuke SHIGEMURA, Junichi Ariyoshi, Kazuki Kajitani, Yuji Fukano | 2019-07-09 |
| 10115730 | Three-dimensional memory device containing structurally reinforced pedestal channel portions and method of making thereof | Ashish Baraskar, Yanli Zhang, Raghuveer S. Makala, Hiroyuki Tanaka, Ryo Nakamura +1 more | 2018-10-30 |
| 9978766 | Three-dimensional memory device with electrically isolated support pillar structures and method of making thereof | Takeshi Kawamura, Yoko Furihata, Kota Funayama | 2018-05-22 |
| 9825049 | Semiconductor device and manufacturing method of semiconductor device | Daisuke Okada, Kozo Katayama | 2017-11-21 |
| 9340352 | Water-soluble film roll and method for paying out water-soluble film | Shintaro Hikasa | 2016-05-17 |
| 9245900 | Semiconductor device and manufacturing method of semiconductor device | Daisuke Okada, Kozo Katayama | 2016-01-26 |
| 7419869 | Semiconductor device and a method for manufacturing the same | Tetsuo Adachi | 2008-09-02 |
| 7303951 | Method of manufacturing a trench isolation region in a semiconductor device | Kenji Kanamitsu, Takashi Moriyama | 2007-12-04 |
| 7282411 | Method of manufacturing a nonvolatile semiconductor memory device | Kenji Kanamitsu, Takashi Moriyama, Keiichi Haraguchi, Tetsuo Adachi | 2007-10-16 |