Issued Patents All Time
Showing 26–50 of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10872899 | Three-dimensional memory device including signal and power connection lines extending through dielectric regions and methods of making the same | Jee-Yeon Kim, Kwang Ho Kim | 2020-12-22 |
| 10861873 | Three-dimensional memory device including signal and power connection lines extending through dielectric regions and methods of making the same | Jee-Yeon Kim, Kwang Ho Kim | 2020-12-08 |
| 10840260 | Through-array conductive via structures for a three-dimensional memory device and methods of making the same | James Kai, Murshed Chowdhury, Johann Alsmeier, Masaaki Higashitani | 2020-11-17 |
| 10726921 | Increased terrace configuration for non-volatile memory | Chia-Lin Hsiung, Tai-Yuan Tseng, Yan Li | 2020-07-28 |
| 10720213 | Word line decoder circuitry under a three-dimensional memory array | Hiroyuki Ogawa, Takuya Ariki | 2020-07-21 |
| 10658381 | Memory die having wafer warpage reduction through stress balancing employing rotated three-dimensional memory arrays and method of making the same | Jixin Yu, Masaaki Higashitani, Tong Zhang, Chun Ge, Xin Li +1 more | 2020-05-19 |
| 10580787 | Three-dimensional memory device containing dummy antenna diodes | Masatoshi Nishikawa | 2020-03-03 |
| 10510738 | Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof | Kwang Ho Kim, Masaaki Higashitani, Akio Nishida | 2019-12-17 |
| 10381371 | Through-memory-level via structures for a three-dimensional memory device | Hiroyuki Ogawa, Yuki Mizutani | 2019-08-13 |
| 10319680 | Metal contact via structure surrounded by an air gap and method of making thereof | Jongsun Sel, Masaaki Higashitani, Mohan Dunga, Peter Rabkin | 2019-06-11 |
| 10256248 | Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof | Zhenyu Lu, Jixin Yu, Johann Alsmeier, Yuki Mizutani, Hiroyuki Ogawa +5 more | 2019-04-09 |
| 9929174 | Three-dimensional memory device having non-uniform spacing among memory stack structures and method of making thereof | Yuki Mizutani, Hiroyuki Ogawa, Masaaki Higashitani, Fumitaka Amano, Kota Funayama +1 more | 2018-03-27 |
| 9922716 | Architecture for CMOS under array | Chia-Lin Hsiung, Yanbin An, Alexander Chu | 2018-03-20 |
| 9922987 | Three-dimensional memory device containing separately formed drain select transistors and method of making thereof | Yuki Mizutani, James Kai, Shigehiro Fujino, Johann Alsmeier | 2018-03-20 |
| 9859422 | Field effect transistor with elevated active regions and methods of manufacturing the same | Masatoshi Nishikawa, Akira Inoue | 2018-01-02 |
| 9818693 | Through-memory-level via structures for a three-dimensional memory device | Hiroyuki Ogawa, Yoko Furihata, James Kai, Yuki Mizutani, Jixin Yu +2 more | 2017-11-14 |
| 9806093 | Through-memory-level via structures for a three-dimensional memory device | Yuki Mizutani, Hiroyuki Ogawa | 2017-10-31 |
| 9768186 | Three dimensional memory device having well contact pillar and method of making thereof | Seiji Shimabukuro, Ryoichi Honma, Hiroyuki Ogawa, Yuki Mizutani | 2017-09-19 |
| 9721663 | Word line decoder circuitry under a three-dimensional memory array | Hiroyuki Ogawa, Takuya Ariki | 2017-08-01 |
| 9620512 | Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device | Masatoshi Nishikawa, Hiroaki Koketsu, Junji Oh | 2017-04-11 |
| 9478461 | Conductive line structure with openings | Kiyokazu Shishido, Takuya Futase, Hiroto Ohori, Kotaro Jinnouchi, Noritaka Fukuo +1 more | 2016-10-25 |
| 9449701 | Non-volatile storage systems and methods | Chia-Lin Hsiung, Mohan Dunga | 2016-09-20 |
| 9412749 | Three dimensional memory device having well contact pillar and method of making thereof | Seiji Shimabukuro, Ryoichi Honma, Hiroyuki Ogawa, Yuki Mizutani | 2016-08-09 |
| 9312015 | Methods for reducing body effect and increasing junction breakdown voltage | Chia-Lin Hsiung, Masaaki Higashitani | 2016-04-12 |
| 9245898 | NAND flash memory integrated circuits and processes with controlled gate height | Eiichi Fujikura, Susumu Okazaki, Takuya Futase, Hiroaki Koketsu | 2016-01-26 |