Issued Patents All Time
Showing 25 most recent of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431424 | Buried power rails integrated with decoupling capacitance | Harald Gossner, Wolfgang Molzer, Georg Seidemann, Michael Langenbuch, Martin Ostermayr +3 more | 2025-09-30 |
| 12406925 | Bare-die smart bridge connected with copper pillars for system-in-package apparatus | Georg Seidemann, Thomas Wagner, Andreas Wolter | 2025-09-02 |
| 12394726 | Method to implement wafer-level chip-scale packages with grounded conformal shield | Gianni SIGNORINI, Georg Seidemann | 2025-08-19 |
| 12374625 | Microelectronic assemblies having topside power delivery structures | Carlton Hanna, Stephen L. Morein, Lizabeth Keser, Georg Seidemann | 2025-07-29 |
| 12362251 | Fan out package with integrated peripheral devices and methods | Lizabeth Keser, Thomas Ort, Thomas Wagner | 2025-07-15 |
| 12341096 | Bare-die smart bridge connected with copper pillars for system-in-package apparatus | Georg Seidemann, Thomas Wagner, Andreas Wolter | 2025-06-24 |
| 12243856 | Fan out packaging pop mechanical attach method | David O'Sullivan, Georg Seidemann, Richard Patten | 2025-03-04 |
| 12243828 | Microelectronic assemblies having topside power delivery structures | Carlton Hanna, Stephen L. Morein, Lizabeth Keser, Georg Seidemann | 2025-03-04 |
| 12211796 | Microelectronic assemblies having topside power delivery structures | Carlton Hanna, Stephen L. Morein, Lizabeth Keser, Georg Seidemann | 2025-01-28 |
| 12191571 | Antenna with graded dielectirc and method of making the same | Saravana Maruthamuthu, Andreas Augustin, Georg Seidemann | 2025-01-07 |
| 12125815 | Assembly of 2XD module using high density interconnect bridges | Andreas Wolter, Georg Seidemann, Thomas Wagner | 2024-10-22 |
| 12080655 | Method to implement wafer-level chip-scale packages with grounded conformal shield | Gianni SIGNORINI, Georg Seidemann | 2024-09-03 |
| 12057411 | Stress relief die implementation | Stephan Stoeckl, Wolfgang Molzer, Georg Seidemann | 2024-08-06 |
| 12057364 | Package formation methods including coupling a molded routing layer to an integrated routing layer | Lizabeth Keser, Thomas Ort, Thomas Wagner | 2024-08-06 |
| 11955395 | Fan out package with integrated peripheral devices and methods | Lizabeth Keser, Thomas Ort, Thomas Wagner | 2024-04-09 |
| 11877403 | Printed wiring-board islands for connecting chip packages and methods of assembling same | Georg Seidemann, Sonja Koller | 2024-01-16 |
| 11764187 | Semiconductor packages, and methods for forming semiconductor packages | Georg Seidemann, Thomas Wagner, Andreas Wolter, Andreas Augustin, Sonja Koller +2 more | 2023-09-19 |
| 11735570 | Fan out packaging pop mechanical attach method | David O'Sullivan, Georg Seidemann, Richard Patten | 2023-08-22 |
| 11581287 | Chip scale thin 3D die stacked package | Robert L. Sankman, Sanka Ganesan, Thomas Wagner, Lizabeth Keser | 2023-02-14 |
| 11508637 | Fan out package and methods | Lizabeth Keser, Thomas Ort, Thomas Wagner | 2022-11-22 |
| 11469213 | Systems, methods, and apparatuses for implementing reduced height semiconductor packages for mobile electronics | Georg Seidemann, Thomas Wagner, Klaus Reingruber, Andreas Wolter | 2022-10-11 |
| 11456116 | Magnetic coils in locally thinned silicon bridges and methods of assembling same | Andreas Augustin, Sonja Koller, Reinhard Mahnkopf, Georg Seidemann | 2022-09-27 |
| 11404339 | Fan out package with integrated peripheral devices and methods | Lizabeth Keser, Thomas Ort, Thomas Wagner | 2022-08-02 |
| 11380616 | Fan out package-on-package with adhesive die attach | David O'Sullivan, Thomas J. Huber | 2022-07-05 |
| 11374323 | Patch antennas stitched to systems in packages and methods of assembling same | Andreas Augustin, Sonja Koller, Georg Seidemann, Andreas Wolter, Stephan Stoeckl +2 more | 2022-06-28 |