Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11955462 | Package stacking using chip to wafer bonding | Georg Seidemann, Christian Geissler, Sven Albers, Andreas Wolter, Marc Dittes +1 more | 2024-04-09 |
| 11715820 | Optoelectronic component and method for producing an optoelectronic component | Michael Zitzlsperger, Matthias Goldbach | 2023-08-01 |
| 11670745 | Method for producing optoelectronic semiconductor components, and optoelectronic semiconductor component | Andreas Reith, Tobias Gebuhr | 2023-06-06 |
| 11469213 | Systems, methods, and apparatuses for implementing reduced height semiconductor packages for mobile electronics | Georg Seidemann, Thomas Wagner, Bernd Waidhas, Andreas Wolter | 2022-10-11 |
| 11424209 | Wafer level package structure with internal conductive layer | Sven Albers, Georg Seidemann, Christian Geissler, Richard Patten | 2022-08-23 |
| 11239199 | Package stacking using chip to wafer bonding | Georg Seidemann, Christian Geissler, Sven Albers, Andreas Wolter, Marc Dittes +1 more | 2022-02-01 |
| 10937932 | Optoelectronic component and method of producing an optoelectronic component | Peter Nagel, Simone Brantl, Konrad Wagner, Ralf Müller | 2021-03-02 |
| 10854590 | Semiconductor die package with more than one hanging die | Sven Albers, Richard Patten, Georg Seidemann, Christian Geissler | 2020-12-01 |
| 10816742 | Integrated circuit packages including an optical redistribution layer | Georg Seidemann, Christian Geissler, Sven Albers, Thomas Wagner, Marc Dittes +2 more | 2020-10-27 |
| 10741486 | Electronic components having three-dimensional capacitors in a metallization stack | Sven Albers, Christian Geissler | 2020-08-11 |
| 10714455 | Integrated circuit package assemblies including a chip recess | Georg Seidemann | 2020-07-14 |
| 10680147 | Method of producing a lighting device | Peter Nagel | 2020-06-09 |
| 10672731 | Wafer level package structure with internal conductive layer | Sven Albers, Georg Seidemann, Christian Geissler, Richard Patten | 2020-06-02 |
| 10651102 | Interposer with conductive routing exposed on sidewalls | Christian Geissler, Georg Seidemann, Sonja Koller | 2020-05-12 |
| 10553538 | Semiconductor package having a variable redistribution layer thickness | Sven Albers, Christian Geissler, Georg Seidemann, Bernd Waidhas, Thomas Wagner +1 more | 2020-02-04 |
| 10522485 | Electrical device and a method for forming an electrical device | Christian Geissler, Sven Albers, Georg Seidemann, Andreas Wolter, Thomas Wagner +1 more | 2019-12-31 |
| 10490527 | Vertical wire connections for integrated circuit package | Christian Geissler, Sven Albers, Georg Seidemann, Andreas Wolter, Thomas Wagner +1 more | 2019-11-26 |
| 10446541 | Advanced node cost reduction by ESD interposer | Georg Seidemann, Christian Geissler | 2019-10-15 |
| 10411000 | Microelectronic package with illuminated backside exterior | Marc Dittes, Sven Albers, Christian Geissler, Andreas Wolter, Georg Seidemann +2 more | 2019-09-10 |
| 10403609 | System-in-package devices and methods for forming system-in-package devices | Christian Geissler, Sven Albers, Georg Seidemann, Andreas Wolter, Thomas Wagner +1 more | 2019-09-03 |
| 10366968 | Interconnect structure for a microelectronic device | Andreas Wolter, Georg Seidemann, Thomas Wagner, Bernd Waidhas | 2019-07-30 |
| 10228725 | Flexible band wearable electronic device | Sven Albers, Andreas Wolter, Georg Seidemann, Christian Geissler, Thorsten Meyer +1 more | 2019-03-12 |
| 10209466 | Integrated circuit packages including an optical redistribution layer | Georg Seidemann, Christian Geissler, Sven Albers, Thomas Wagner, Marc Dittes +2 more | 2019-02-19 |
| 10186499 | Integrated circuit package assemblies including a chip recess | Georg Seidemann | 2019-01-22 |
| 10170409 | Package on package architecture and method for making | Sanka Ganesan, John S. Guzek, Nitesh Nimkar, Thorsten Meyer | 2019-01-01 |