Issued Patents All Time
Showing 25 most recent of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431424 | Buried power rails integrated with decoupling capacitance | Bernd Waidhas, Harald Gossner, Wolfgang Molzer, Georg Seidemann, Michael Langenbuch +3 more | 2025-09-30 |
| 12406925 | Bare-die smart bridge connected with copper pillars for system-in-package apparatus | Georg Seidemann, Andreas Wolter, Bernd Waidhas | 2025-09-02 |
| 12362241 | Semiconductor structure and method for forming a semiconductor structure | Richard Geiger, Klaus Herold, Harald Gossner, Martin Ostermayr, Georgios Panagopoulos +2 more | 2025-07-15 |
| 12362251 | Fan out package with integrated peripheral devices and methods | Lizabeth Keser, Bernd Waidhas, Thomas Ort | 2025-07-15 |
| 12341096 | Bare-die smart bridge connected with copper pillars for system-in-package apparatus | Georg Seidemann, Andreas Wolter, Bernd Waidhas | 2025-06-24 |
| 12308335 | Integrating and accessing passive components in wafer-level packages | Gianni SIGNORINI, Veronica Sciriha | 2025-05-20 |
| 12125815 | Assembly of 2XD module using high density interconnect bridges | Bernd Waidhas, Andreas Wolter, Georg Seidemann | 2024-10-22 |
| 12057364 | Package formation methods including coupling a molded routing layer to an integrated routing layer | Lizabeth Keser, Thomas Ort, Bernd Waidhas | 2024-08-06 |
| 11990408 | WLCSP reliability improvement for package edges including package shielding | Jan Proschwitz | 2024-05-21 |
| 11955395 | Fan out package with integrated peripheral devices and methods | Lizabeth Keser, Bernd Waidhas, Thomas Ort | 2024-04-09 |
| 11764187 | Semiconductor packages, and methods for forming semiconductor packages | Bernd Waidhas, Georg Seidemann, Andreas Wolter, Andreas Augustin, Sonja Koller +2 more | 2023-09-19 |
| 11646288 | Integrating and accessing passive components in wafer-level packages | Gianni SIGNORINI, Veronica Sciriha | 2023-05-09 |
| 11581287 | Chip scale thin 3D die stacked package | Robert L. Sankman, Sanka Ganesan, Bernd Waidhas, Lizabeth Keser | 2023-02-14 |
| 11508637 | Fan out package and methods | Lizabeth Keser, Thomas Ort, Bernd Waidhas | 2022-11-22 |
| 11469213 | Systems, methods, and apparatuses for implementing reduced height semiconductor packages for mobile electronics | Georg Seidemann, Klaus Reingruber, Bernd Waidhas, Andreas Wolter | 2022-10-11 |
| 11404339 | Fan out package with integrated peripheral devices and methods | Lizabeth Keser, Bernd Waidhas, Thomas Ort | 2022-08-02 |
| 11374323 | Patch antennas stitched to systems in packages and methods of assembling same | Andreas Augustin, Sonja Koller, Bernd Waidhas, Georg Seidemann, Andreas Wolter +2 more | 2022-06-28 |
| 11270941 | Bare-die smart bridge connected with copper pillars for system-in-package apparatus | Georg Seidemann, Andreas Wolter, Bernd Waidhas | 2022-03-08 |
| 11211337 | Face-up fan-out electronic package with passive components using a support | Lizabeth Keser, Thomas Ort, Bernd Waidhas | 2021-12-28 |
| 11177220 | Vertical and lateral interconnects between dies | Georg Seidemann, Andreas Wolter, Bernd Waidhas | 2021-11-16 |
| 11127813 | Semiconductor inductors | Georg Seidemann, Bernd Waidhas, Andreas Wolter, Andreas Augustin | 2021-09-21 |
| 11107763 | Interconnect structure for stacked die in a microelectronic device | Andreas Wolter, Georg Seidemann | 2021-08-31 |
| 11018114 | Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory | Bernd Waidhas, Georg Seidemann, Andreas Augustin, Laurent Millou, Andreas Wolter +2 more | 2021-05-25 |
| 10816742 | Integrated circuit packages including an optical redistribution layer | Georg Seidemann, Christian Geissler, Sven Albers, Marc Dittes, Klaus Reingruber +2 more | 2020-10-27 |
| 10756042 | Multi-layer redistribution layer for wafer-level packaging | — | 2020-08-25 |