Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431424 | Buried power rails integrated with decoupling capacitance | Bernd Waidhas, Harald Gossner, Georg Seidemann, Michael Langenbuch, Martin Ostermayr +3 more | 2025-09-30 |
| 12057411 | Stress relief die implementation | Stephan Stoeckl, Georg Seidemann, Bernd Waidhas | 2024-08-06 |
| 10845073 | Method and device for temperature control in a radio receiver | Sven Dortmund, Kenan Kocagoez, Jose A. Cesares Cano, Matthias Obermeier | 2020-11-24 |
| 9583595 | Methods of forming low noise semiconductor devices | Giovanni Calabrese, Domagoj Siprak, Uwe Hodel | 2017-02-28 |
| 9564400 | Methods of forming stacked microelectronic dice embedded in a microelectronic substrate | Reinhard Mahnkopf, Bernd Memmler, Edmund Goetz, Hans-Joachim Barth, Sven Albers +1 more | 2017-02-07 |
| 9373588 | Stacked microelectronic dice embedded in a microelectronic substrate | Reinhard Mahnkopf, Bernd Memmler, Edmund Goetz, Hans-Joachim Barth, Sven Albers +1 more | 2016-06-21 |
| 9252077 | Package vias for radio frequency antenna connections | Edmund Goetz, Reinhard Mahnkopf, Bernd Memmler | 2016-02-02 |
| 9209143 | Die edge side connection | Georg Seidemann, Sven Albers, Teodora Ossiander, Michael P. Skinner, Hans-Joachim Barth +3 more | 2015-12-08 |
| 9171726 | Low noise semiconductor devices | Giovanni Calabrese, Domagoj Siprak, Uwe Hodel | 2015-10-27 |
| 6750483 | Silicon-germanium bipolar transistor with optimized germanium profile | Wolfgang Klein, Rudolf Lachner | 2004-06-15 |