Issued Patents All Time
Showing 26–50 of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9490320 | Uniaxially strained nanowire structure | Stephen M. Cea, Seiyon Kim | 2016-11-08 |
| 9484272 | Methods for fabricating strained gate-all-around semiconductor devices by fin oxidation using an undercut etch-stop layer | Abhijit Jayant Pethe, Tahir Ghani, Harry Gomez | 2016-11-01 |
| 9472399 | Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates | Pragyansri Pathi, Bruce Beattie, Abhijit Jayant Pethe | 2016-10-18 |
| 9472613 | Conversion of strain-inducing buffer to electrical insulator | Van H. Le, Glenn A. Glass, Kelin J. Kuhn, Stephen M. Cea | 2016-10-18 |
| 9461143 | Gate contact structure over active gate and method to fabricate same | Abhijit Jayant Pethe, Tahir Ghani, Mark Bohr, Clair Webb, Harry Gomez | 2016-10-04 |
| 9425212 | Isolated and bulk semiconductor devices formed on a same bulk substrate | Kelin J. Kuhn, Rafael Rios, Harry Gomez | 2016-08-23 |
| 9224808 | Uniaxially strained nanowire structure | Stephen M. Cea, Seiyon Kim | 2015-12-29 |
| 9224810 | CMOS nanowire structure | Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Anand S. Murthy, Stephen M. Cea +2 more | 2015-12-29 |
| 9129827 | Conversion of strain-inducing buffer to electrical insulator | Van H. Le, Glenn A. Glass, Kelin J. Kuhn, Stephen M. Cea | 2015-09-08 |
| 9129829 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Rafael Rios, Stephen M. Cea, Martin D. Giles +3 more | 2015-09-08 |
| 9087863 | Nanowire structures having non-discrete source and drain regions | Stephen M. Cea, Martin D. Giles, Rafael Rios, Seiyon Kim, Kelin J. Kuhn | 2015-07-21 |
| 9041106 | Three-dimensional germanium-based semiconductor devices formed on globally or locally isolated substrates | Pragyansri Pathi, Bruce Beattie, Abhijit Jayant Pethe | 2015-05-26 |
| 9029221 | Semiconductor devices having three-dimensional bodies with modulated heights | Kelin J. Kuhn, Rafael Rios, Aura Cecilia Davila Latorre, Tahir Ghani | 2015-05-12 |
| 8853741 | Junctionless accumulation-mode devices on decoupled prominent architectures | Kelin J. Kuhn, Rafael Rios, Titash Rakshit, Sivakumar Mudanai | 2014-10-07 |
| 8753942 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Rafael Rios, Stephen M. Cea, Martin D. Giles +3 more | 2014-06-17 |
| 8735869 | Strained gate-all-around semiconductor devices formed on globally or locally isolated substrates | Abhijit Jayant Pethe, Tahir Ghani, Harry Gomez | 2014-05-27 |
| 8507948 | Junctionless accumulation-mode devices on prominent architectures, and methods of making same | Kelin J. Kuhn, Rafael Rios, Titash Rakshit, Sivakumar Mudanai | 2013-08-13 |
| 8313999 | Multi-gate semiconductor device with self-aligned epitaxial source and drain | Tahir Ghani, Kuan-Yueh Shen, Anand S. Murthy, Harry Gomez | 2012-11-20 |
| 8148786 | Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate | Jack T. Kavalieros, Justin K. Brask, Mark L. Doczy, Matthew V. Metz, Suman Datta +2 more | 2012-04-03 |
| 7671471 | Method for making a semiconductor device having a high-k dielectric layer and a metal gate electrode | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Chris Barns +3 more | 2010-03-02 |
| 7569443 | Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate | Jack T. Kavalieros, Justin K. Brask, Mark L. Doczy, Matthew V. Metz, Suman Datta +2 more | 2009-08-04 |
| 7355281 | Method for making semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Chris Barns +3 more | 2008-04-08 |
| 7153784 | Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode | Justin K. Brask, Jack T. Kavalieros, Mark L. Doczy, Uday Shah, Chris Barns +3 more | 2006-12-26 |
| 7053454 | Semiconductor component, method for producing the semiconductor component, and method for producing electrical connections between individual circuit elements | Rudolf Lachner | 2006-05-30 |
| 6835612 | Method for fabricating a MOSFET having a very small channel length | Ludwig Dittmar, Dirk Schumann | 2004-12-28 |