| 8943301 |
Storing branch information in an address table of a processor |
Brian R. Konigsburg, David S. Levitan, Samuel Thomas |
2015-01-27 |
| 8037034 |
Methods of creating a dictionary for data compression |
Piotr M. Plachta, Balakrishna Raghavendra Iyer, Steven Wayne White |
2011-10-11 |
| 7984280 |
Storing branch information in an address table of a processor |
Brian R. Konigsburg, David S. Levitan, Samuel Thomas |
2011-07-19 |
| 7973680 |
Method and system for creating an in-memory physical dictionary for data compression |
Balakrishna Raghavendra Iyer, Piotr M. Plachta, Steven Wayne White |
2011-07-05 |
| 7890738 |
Method and logical apparatus for managing processing system resource use for speculative execution |
Lee Evan Eisen, David S. Levitan, Francis Patrick O'Connell |
2011-02-15 |
| 7809933 |
System and method for optimizing branch logic for handling hard to predict indirect branches |
David S. Levitan |
2010-10-05 |
| 7779234 |
System and method for implementing a hardware-supported thread assist under load lookahead mechanism for a microprocessor |
James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Benjamin W. Stolt, Michael Thomas Vaden |
2010-08-17 |
| 7627742 |
Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system |
Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Michael K. Gschwind, Ravi Nair +2 more |
2009-12-01 |
| 7460033 |
Method for creating an in-memory physical dictionary for data compression |
Balakrishna Raghavendra Iyer, Piotr M. Plachta, Steven Wayne White |
2008-12-02 |
| 7454597 |
Computer processing system employing an instruction schedule cache |
Krishnan K. Kailas, Ravi Nair, Sumedh W. Sathaye, John-David Wellman |
2008-11-18 |
| 7426631 |
Methods and systems for storing branch information in an address table of a processor |
Brian R. Konigsburg, David S. Levitan, Samuel Thomas |
2008-09-16 |
| 7283072 |
Methods of creating a dictionary for data compression |
Piotr M. Plachta, Balakrishna Raghavendra Iyer, Steven Wayne White |
2007-10-16 |
| 7228403 |
Method for handling 32 bit results for an out-of-order processor with a 64 bit architecture |
Petra Leber, Jens Leenstra, Dieter Wendel |
2007-06-05 |
| 6938148 |
Managing load and store operations using a storage management unit with data flow architecture |
Charles Roberts Moore, Ravi Nair |
2005-08-30 |
| 5930491 |
Identification of related instructions resulting from external to internal translation by use of common ID field for each group |
Rolf Hilgendorf, Hartmut Schwermer |
1999-07-27 |
