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Checkpointing a superscalar, out-of-order processor for error recovery |
Harry Barowski, Hans-Werner Tast |
2005-11-22 |
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Identification of related instructions resulting from external to internal translation by use of common ID field for each group |
Rolf Hilgendorf, Wolfram Sauer |
1999-07-27 |
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Dynamic conversion between different instruction codes by recombination of instruction elements |
Rolf Hilgendorf, Werner Soell |
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Coupled synchronous-asychronous bus structure for transferring data between a plurality of peripheral input/output controllers and a main data store |
Donall G. Bourke, Douglas R. Chisholm, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu +5 more |
1996-04-16 |
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Method for performing inter-unit data transfer operations among a plurality of input/output bus interface units coupled to a common asynchronous bus |
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1995-10-03 |
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Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses |
Donall G. Bourke, Douglas R. Chisholm, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu +5 more |
1994-01-04 |
| 5199106 |
Input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the bus |
Donall G. Bourke, Douglas R. Chisholm, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu +5 more |
1993-03-30 |
