RH

Rolf Hilgendorf

IBM: 17 patents #6,502 of 70,183Top 10%
📍 Eppelheim, TX: #1 of 2 inventorsTop 50%
Overall (All Time): #278,269 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
8230440 System and method to distribute accumulated processor utilization charges among multiple threads Michael J. Genden 2012-07-24
7890782 Dynamic power management in an execution unit using pipeline wave flow control Christopher M. Abernathy, Gilles Gervais 2011-02-15
7865749 Method and apparatus for dynamic system-level frequency scaling Peter A. Sandon, Cedric Lichtenau, Martin Recktenwald, Thomas Pflueger 2011-01-04
7646838 Providing accurate time-based counters for scaling operating frequencies of microprocessors Jens Kuenzer, Cedric Lichtenau, Thomas Pflueger, Martin Recktenwald, Andreas Schmid 2010-01-12
7602874 Providing accurate time-based counters for scaling operating frequencies of microprocessors Jens Kuenzer, Cedric Lichtenau, Thomas Pflueger, Martin Recktenwald, Andreas Schmid 2009-10-13
7376875 Method of improving logical built-in self test (LBIST) AC fault isolations Johannes Koesters, Thomas Pflueger 2008-05-20
7321247 Timer facility for high frequency processors with minimum dependency of processor frequency modes Cedric Lichtenau, Michael Fan Wang 2008-01-22
6989696 System and method for synchronizing divide-by counters Jens Kuenzer, Cedric Lichtenau, Thomas Pflueger, Mathew I. Ringler, Gerard M. Salem +3 more 2006-01-24
6986027 Universal load address/value prediction using stride-based pattern history and last-value prediction in a two-level table scheme Harry Barowski 2006-01-10
6967510 Time-base implementation for correcting accumulative error with chip frequency scaling Jonathan James DeMent, Cedric Lichtenau, Michael Fan Wang 2005-11-22
5974543 Apparatus and method for performing subroutine call and return operations Oliver Laub, Hans-Werner Tast 1999-10-26
5930491 Identification of related instructions resulting from external to internal translation by use of common ID field for each group Wolfram Sauer, Hartmut Schwermer 1999-07-27
5925124 Dynamic conversion between different instruction codes by recombination of instruction elements Hartmut Schwermer, Werner Soell 1999-07-20
5568407 Method and system for the design verification of logic units and use in different environments Jurgen Hass, Siegfried Neuber, Thomas Schlipf, Hartmut Ulland 1996-10-22
5524270 System for transferring data between asynchronous data buses with a data buffer interposed in between the buses for synchronization of devices timed by different clocks Juergen Haess 1996-06-04
5355455 Method and apparatus for avoiding deadlock in a computer system with two or more protocol-controlled buses interconnected by a bus adaptor Thomas Schlipf 1994-10-11
5317696 Bus arbitration scheme 1994-05-31