Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8826206 | Testing two-state logic power island interface | Elspeth Anne Huston, Klaus-Dieter Schubert, Marshall D. Tiner | 2014-09-02 |
| 7853420 | Performing temporal checking | Parag Birmiwal, Sundeep Chadha, Tilman Gloekler | 2010-12-14 |
| 7725789 | Apparatus for efficiently loading scan and non-scan memory elements | Richard Clair Anderson, Steven L. Roberts | 2010-05-25 |
| 7565636 | System for performing verification of logic circuits | Bodo Hoppe, Christoph Jaeschke | 2009-07-21 |
| 7478304 | Apparatus for accelerating through-the-pins LBIST simulation | Tilman Gloekler, Christian Habermann, Naoki Kiryu, Joachim Kneisel | 2009-01-13 |
| 7464354 | Method and apparatus for performing temporal checking | Parag Birmiwal, Sundeep Chadha, Tilman Gloekler | 2008-12-09 |
| 7447960 | Method of efficiently loading scan and non-scan memory elements | Richard Clair Anderson, Steven L. Roberts | 2008-11-04 |
| 7398494 | Method for performing verification of logic circuits | Bodo Hoppe, Christoph Jaeschke | 2008-07-08 |
| 7386775 | Scan verification for a scan-chain device under test | Parag Birmiwal, Tilman Gloekler, Klaus Heinzelmann | 2008-06-10 |
| 7376875 | Method of improving logical built-in self test (LBIST) AC fault isolations | Rolf Hilgendorf, Thomas Pflueger | 2008-05-20 |
| 7353159 | Method for parallel simulation on a single microprocessor using meta-models | Frank Armbruster, Bodo Hoppe, Klaus-Dieter Schubert | 2008-04-01 |
| 7350124 | Method and apparatus for accelerating through-the pins LBIST simulation | Tilman Gloekler, Christian Habermann, Naoki Kiryu, Joachim Kneisel | 2008-03-25 |
| 7305636 | Method and system for formal unidirectional bus verification using synthesizing constrained drivers | Jason R. Baumgartner, Tilman Gloekler, Joachim Kneisel | 2007-12-04 |
| 7213220 | Method for verification of gate level netlists using colored bits | Bodo Hoppe, Christoph Jaeschke | 2007-05-01 |