JB

Jason R. Baumgartner

IBM: 146 patents #302 of 70,183Top 1%
Overall (All Time): #6,488 of 4,157,543Top 1%
147
Patents All Time

Issued Patents All Time

Showing 25 most recent of 147 patents

Patent #TitleCo-InventorsDate
11740872 Detection of unintended dependencies in hardware designs with pseudo-random number generators Bradley Donald Bingham, Viresh Paruthi, Praveen S. Reddy 2023-08-29
10970454 Scalable connectivity verification using conditional cut-points Pradeep Kumar Nalla, Raj Kumar Gajavelly, Raja Bilwakeshwar Ivaturi 2021-04-06
10789403 Grouping and partitioning of properties for logic verification Rohit DUREJA, Alexander Ivrii, Robert L. Kanzelman 2020-09-29
10621297 Initial-state and next-state value folding Robert L. Kanzelman, Pradeep Kumar Nalla, Raj Kumar Gajavelly, Dheeraj Baby 2020-04-14
10579770 Scalable connectivity verification using conditional cut-points Pradeep Kumar Nalla, Raj Kumar Gajavelly, Raja Bilwakeshwar Ivaturi 2020-03-03
10540468 Verification complexity reduction via range-preserving input-to-constant conversion Raj Kumar Gajavelly, Robert L. Kanzelman, Alexander Ivrii, Pradeep Kumar Nalla 2020-01-21
10474777 Scalable liveness verification Pradeep Kumar Nalla, Raj Kumar Gajavelly, Alexander Ivrii 2019-11-12
10394987 Adaptive bug-search depth for simple and deep counterexamples Raj Kumar Gajavelly, Hari Mony, Pradeep Kumar Nalla 2019-08-27
10210296 Adaptive bug-search depth for simple and deep counterexamples Raj Kumar Gajavelly, Hari Mony, Pradeep Kumar Nalla 2019-02-19
10078716 Scalable logic verification by identifying unate primary inputs Raj Kumar Gajavelly, Alexander Ivrii, Pradeep Kumar Nalla 2018-09-18
9922153 Scalable logic verification by identifying unate primary inputs Raj Kumar Gajavelly, Alexander Ivrii, Pradeep Kumar Nalla 2018-03-20
9740589 Lifting of bounded liveness counterexamples to concrete liveness counterexamples Raj Kumar Gajavelly, Alexander Ivrii, Pradeep Kumar Nalla 2017-08-22
9715564 Scalable and automated identification of unobservability causality in logic optimization flows Raj Kumar Gajavelly, Ashutosh Misra, Pradeep Kumar Nalla 2017-07-25
9678853 Lifting of bounded liveness counterexamples to concrete liveness counterexamples Raj Kumar Gajavelly, Alexander Ivrii, Pradeep Kumar Nalla 2017-06-13
9483595 Method for scalable liveness verification via abstraction refinement Raj Kumar Gajavelly, Robert L. Kanzelman, Hari Mony, Pradeep Kumar Nalla 2016-11-01
9471734 System and program product for scalable liveness verification via abstraction refinement Raj Kumar Gajavelly, Robert L. Kanzelman, Hari Mony, Pradeep Kumar Nalla 2016-10-18
9280626 Efficiently determining Boolean satisfiability with lazy constraints Michael L. Case, Robert L. Kanzelman, Hari Mony 2016-03-08
8850372 Method and system for performing invariant-guided abstraction of a logic design Alexander Ivrii, Arie Matsliah, Hari Mony 2014-09-30
8799837 Optimizing a netlist circuit representation by leveraging binary decision diagrams to perform rewriting Geert Janssen, Robert L. Kanzelman, Viresh Paruthi 2014-08-05
8739085 Vectorization of bit-level netlists Steven M. German 2014-05-27
8688608 Verifying correctness of regular expression transformations that use a post-processor Kubilay Atasu, Christoph Hagleitner, Mitra Purandare 2014-04-01
8627273 Model checking of liveness property in a phase abstracted model Shaked Flur, Ziv Nevo, Paul Joseph Roessler 2014-01-07
8589327 Efficiently determining boolean satisfiability with lazy constraints Michael L. Case, Robert L. Kanzelman, Hari Mony 2013-11-19
8589837 Constructing inductive counterexamples in a multi-algorithm verification framework Michael L. Case, Robert L. Kanzelman, Hari Mony 2013-11-19
8578311 Method and system for optimal diameter bounding of designs with complex feed-forward components Michael L. Case, Robert L. Kanzelman, Hari Mony 2013-11-05