| 10460403 |
System and method to reduce human activity damage-induced power outage |
Jayant R. Kalagnanam, Jinjun Xiong, Yada Zhu |
2019-10-29 |
| 8799837 |
Optimizing a netlist circuit representation by leveraging binary decision diagrams to perform rewriting |
Jason R. Baumgartner, Robert L. Kanzelman, Viresh Paruthi |
2014-08-05 |
| 8418093 |
Method and system for design simplification through implication-based analysis |
Jason R. Baumgartner, Michael L. Case, Robert L. Kanzelman |
2013-04-09 |
| 8201117 |
Method for scalable derivation of an implication-based reachable state set overapproximation |
Jason R. Baumgartner, Michael L. Case, Hari Mony |
2012-06-12 |
| 8171437 |
Automated convergence of ternary simulation by saturation of deep gates |
Jason R. Baumgartner, Michael L. Case, Hari Mony |
2012-05-01 |
| 7917874 |
Reversing the effects of sequential reparameterization on traces |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2011-03-29 |
| 7913205 |
Method and system for reversing the effects of sequential reparameterization on traces |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2011-03-22 |
| 7882470 |
Method for heuristic preservation of critical inputs during sequential reparameterization |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2011-02-01 |
| 7853917 |
System for building binary decision diagrams efficiently in a structural network representation of a digital circuit |
Viresh Paruthi, Christian Jacobi, Jiazhao Xu, Kai Weber |
2010-12-14 |
| 7836413 |
Building binary decision diagrams efficiently in a structural network representation of a digital circuit |
Viresh Paruthi, Christian Jacobi, Jiazhao Xu, Kai Weber |
2010-11-16 |
| 7788618 |
Scalable dependent state element identification |
Jason R. Baumgartner, Robert L. Kanzelman, Viresh Paruthi |
2010-08-31 |
| 7765514 |
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2010-07-27 |
| 7752593 |
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2010-07-06 |
| 7689943 |
Parametric reduction of sequential design |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2010-03-30 |
| 7506290 |
Method and system for case-splitting on nodes in a symbolic simulation framework |
Christian Jacobi, Viresh Paruthi, Kai Weber |
2009-03-17 |
| 7475371 |
Method and system for case-splitting on nodes in a symbolic simulation framework |
Christian Jacobi, Viresh Paruthi, Kai Weber |
2009-01-06 |
| 7370298 |
Method for heuristic preservation of critical inputs during sequential reparameterization |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2008-05-06 |
| 7367002 |
Method and system for parametric reduction of sequential designs |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2008-04-29 |
| 7363603 |
Method and system for case-splitting on nodes in a symbolic simulation framework |
Christian Jacobi, Viresh Paruthi, Kai Weber |
2008-04-22 |
| 7350166 |
Method and system for reversing the effects of sequential reparameterization on traces |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2008-03-25 |
| 7350179 |
Method for improved synthesis of binary decision diagrams with inverted edges and quantifiable as well as nonquantifiable variables |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2008-03-25 |
| 7340473 |
Method and system for building binary decision diagrams efficiently in a structural network representation of a digital circuit |
Viresh Paruthi, Christian Jacobi, Jiazhao Xu, Kai Weber |
2008-03-04 |
| 7299432 |
Method for preserving constraints during sequential reparameterization |
Jason R. Baumgartner, Hari Mony, Viresh Paruthi |
2007-11-20 |
| 6698003 |
Framework for multiple-engine based verification tools for integrated circuits |
Jason R. Baumgartner, Andreas Kuehlmann, Viresh Paruthi, Louise H. Trevillyan |
2004-02-24 |
| 6473884 |
Method and system for equivalence-checking combinatorial circuits using interative binary-decision-diagram sweeping and structural satisfiability analysis |
Malay Ganai, Florian Krohm, Andreas Kuehlmann, Viresh Paruthi |
2002-10-29 |
