Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11010160 | Load register on condition immediate instruction | Wolfgang Gellerich, Martin Schwidefsky, Chung-Lung K. Shum | 2021-05-18 |
| 10235168 | Load register on condition immediate or immediate instruction | Wolfgang Gellerich, Martin Schwidefsky, Chung-Lung K. Shum | 2019-03-19 |
| 9594683 | Data processing in a multiple processor system to maintain multiple processor cache memory access coherency | Jens-Peter Dittrich, Christian Jacobi, Matthias Pflanz, Stefan Schuh | 2017-03-14 |
| 9329863 | Load register on condition with zero or immediate instruction | Wolfgang Gellerich, Martin Schwidefsky, Chung-Lung K. Shum | 2016-05-03 |
| 9218442 | Firmware and hardware verification using Opcode comparison | Christopher A. Krygowski, Michael P. Mullen, Timothy J. Slegel | 2015-12-22 |
| 8600724 | Verifying a processor design using a processor simulation model | Stefan Letz, Juergen Vielfort | 2013-12-03 |
| 8402403 | Verifying a register-transfer level design of an execution unit | Stefan Letz, Michelangelo Masini, Juergen Vielfort | 2013-03-19 |
| 8249848 | Verifying a processor design using a processor simulation model | Stefan Letz, Juergen Vielfort | 2012-08-21 |
| 7949968 | Method and system for building binary decision diagrams optimally for nodes in a netlist graph using don't-caring | Christian Jacobi, Udo Krautz, Viresh Paruthi, Matthias Pflanz | 2011-05-24 |
| 7890903 | Method and system for formal verification of an electronic circuit design | Matthias Pflanz, Christian Jacobi, Udo Krautz | 2011-02-15 |
| 7865793 | Test case generation with backward propagation of predefined results and operand dependencies | Stefan Letz, Juergen Vielfort | 2011-01-04 |
| 7853917 | System for building binary decision diagrams efficiently in a structural network representation of a digital circuit | Viresh Paruthi, Christian Jacobi, Geert Janssen, Jiazhao Xu | 2010-12-14 |
| 7836413 | Building binary decision diagrams efficiently in a structural network representation of a digital circuit | Viresh Paruthi, Christian Jacobi, Geert Janssen, Jiazhao Xu | 2010-11-16 |
| 7752583 | System for verification of digital designs using case-splitting via constrained internal signals | Jason R. Baumgartner, Christian Jacobi, Viresh Paruthi | 2010-07-06 |
| 7624363 | Method and apparatus for performing equivalence checking on circuit designs having differing clocking and latching schemes | Jason R. Baumgartner, Tobias Gemmeke, Nicolas Maeding | 2009-11-24 |
| 7506290 | Method and system for case-splitting on nodes in a symbolic simulation framework | Christian Jacobi, Geert Janssen, Viresh Paruthi | 2009-03-17 |
| 7475371 | Method and system for case-splitting on nodes in a symbolic simulation framework | Christian Jacobi, Geert Janssen, Viresh Paruthi | 2009-01-06 |
| 7458048 | Computer program product for verification of digital designs using case-splitting via constrained internal signals | Jason R. Baumgartner, Christian Jacobi, Viresh Paruthi | 2008-11-25 |
| 7367001 | Method, system and computer program product for verification of digital designs using case-splitting via constrained internal signals | Jason R. Baumgartner, Christian Jacobi, Viresh Paruthi | 2008-04-29 |
| 7363603 | Method and system for case-splitting on nodes in a symbolic simulation framework | Christian Jacobi, Geert Janssen, Viresh Paruthi | 2008-04-22 |
| 7340704 | Method and system for optimized automated case-splitting via constraints in a symbolic simulation framework | Jason R. Baumgartner, Christian Jacobi, Viresh Paruthi | 2008-03-04 |
| 7340473 | Method and system for building binary decision diagrams efficiently in a structural network representation of a digital circuit | Viresh Paruthi, Christian Jacobi, Geert Janssen, Jiazhao Xu | 2008-03-04 |
| 7302656 | Method and system for performing functional verification of logic circuits | Christian Jacobi, Nico Gulden, Viresh Paruthi, Klaus Keuerleber | 2007-11-27 |
| 7290229 | Method and system for optimized handling of constraints during symbolic simulation | Jason R. Baumgartner, Christian Jacobi, Viresh Paruthi | 2007-10-30 |