Issued Patents All Time
Showing 25 most recent of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10489209 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2019-11-26 |
| 9928132 | Dynamic accessing of execution elements through modification of issue rules | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2018-03-27 |
| 9864639 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2018-01-09 |
| 9798545 | Anticipated prefetching for a parent core in a multi-core chip | Brian R. Prasky, Fadi Y. Busaba, Steven R. Carlough, Chung-Lung K. Shum | 2017-10-24 |
| 9792120 | Anticipated prefetching for a parent core in a multi-core chip | Brian R. Prasky, Fadi Y. Busaba, Steven R. Carlough, Chung-Lung K. Shum | 2017-10-17 |
| 9519485 | Confidence threshold-based opposing branch path execution for branch prediction | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-12-13 |
| 9501323 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-11-22 |
| 9348599 | Confidence threshold-based opposing branch path execution for branch prediction | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-05-24 |
| 9304848 | Dynamic accessing of execution elements through modification of issue rules | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-04-05 |
| 9286138 | Major branch instructions | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-03-15 |
| 9280398 | Major branch instructions | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-03-08 |
| 9250911 | Major branch instructions with transactional memory | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-02-02 |
| 9229722 | Major branch instructions with transactional memory | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2016-01-05 |
| 9218442 | Firmware and hardware verification using Opcode comparison | Michael P. Mullen, Timothy J. Slegel, Kai Weber | 2015-12-22 |
| 9213608 | Hardware recovery in multi-threaded processor | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-12-15 |
| 9176837 | In situ processor re-characterization | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-11-03 |
| 9164854 | Thread sparing between cores in a multi-threaded processor | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-10-20 |
| 9152510 | Hardware recovery in multi-threaded processor | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-10-06 |
| 9152518 | In situ processor re-characterization | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-10-06 |
| 9141551 | Specific prefetch algorithm for a chip having a parent core and a scout core | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-09-22 |
| 9141550 | Specific prefetch algorithm for a chip having a parent core and a scout core | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-09-22 |
| 9135180 | Prefetching for multiple parent cores in a multi-core chip | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-09-15 |
| 9130740 | Variable acknowledge rate to reduce bus contention in presence of communication errors | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-09-08 |
| 9128852 | Prefetching for a parent core in a multi-core chip | Brian R. Prasky, Fadi Y. Busaba, Steven R. Carlough, Chung-Iung K. Shum | 2015-09-08 |
| 9128851 | Prefetching for multiple parent cores in a multi-core chip | Fadi Y. Busaba, Steven R. Carlough, Brian R. Prasky, Chung-Lung K. Shum | 2015-09-08 |