Issued Patents All Time
Showing 25 most recent of 75 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11922130 | Optimization of arithmetic expressions | Mihir Choudhury, Ayesha Akhter, Alexander Ivrii | 2024-03-05 |
| 10789403 | Grouping and partitioning of properties for logic verification | Rohit DUREJA, Jason R. Baumgartner, Alexander Ivrii | 2020-09-29 |
| 10621297 | Initial-state and next-state value folding | Jason R. Baumgartner, Pradeep Kumar Nalla, Raj Kumar Gajavelly, Dheeraj Baby | 2020-04-14 |
| 10565338 | Equivalency verification for hierarchical references | Ali S. El-Zein, Mark A. Williams, Viresh Paruthi, Wolfgang Roesner | 2020-02-18 |
| 10540468 | Verification complexity reduction via range-preserving input-to-constant conversion | Raj Kumar Gajavelly, Jason R. Baumgartner, Alexander Ivrii, Pradeep Kumar Nalla | 2020-01-21 |
| 9483595 | Method for scalable liveness verification via abstraction refinement | Jason R. Baumgartner, Raj Kumar Gajavelly, Hari Mony, Pradeep Kumar Nalla | 2016-11-01 |
| 9471734 | System and program product for scalable liveness verification via abstraction refinement | Jason R. Baumgartner, Raj Kumar Gajavelly, Hari Mony, Pradeep Kumar Nalla | 2016-10-18 |
| 9280626 | Efficiently determining Boolean satisfiability with lazy constraints | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2016-03-08 |
| 8799837 | Optimizing a netlist circuit representation by leveraging binary decision diagrams to perform rewriting | Jason R. Baumgartner, Geert Janssen, Viresh Paruthi | 2014-08-05 |
| 8589837 | Constructing inductive counterexamples in a multi-algorithm verification framework | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-11-19 |
| 8589327 | Efficiently determining boolean satisfiability with lazy constraints | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-11-19 |
| 8578311 | Method and system for optimal diameter bounding of designs with complex feed-forward components | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-11-05 |
| 8527922 | Method and system for optimal counterexample-guided proof-based abstraction | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-09-03 |
| 8484591 | Enhancing redundancy removal with early merging | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-07-09 |
| 8478574 | Tracking array data contents across three-valued read and write operations | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-07-02 |
| 8418119 | Logical circuit netlist reduction and model simplification using simulation results containing symbolic values | Michael L. Case, Jason R. Baumgartner, Hari Mony | 2013-04-09 |
| 8418093 | Method and system for design simplification through implication-based analysis | Jason R. Baumgartner, Michael L. Case, Geert Janssen | 2013-04-09 |
| 8418106 | Techniques for employing retiming and transient simplification on netlists that include memory arrays | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-04-09 |
| 8413091 | Enhancing redundancy removal with early merging | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2013-04-02 |
| 8407638 | Methods and apparatus for boolean equivalency checking in the presence of voting logic | Victor A. Acuna, Scott Mack, Brian C. Wilson | 2013-03-26 |
| 8336016 | Eliminating, coalescing, or bypassing ports in memory array representations | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2012-12-18 |
| 8327302 | Techniques for analysis of logic designs with transient logic | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2012-12-04 |
| 8307313 | Minimizing memory array representations for enhanced synthesis and verification | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2012-11-06 |
| 8291359 | Array concatenation in an integrated circuit design | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2012-10-16 |
| 8245166 | Optimal correlated array abstraction | Jason R. Baumgartner, Michael L. Case, Hari Mony | 2012-08-14 |