Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10277068 | Architecture to scale finite-state machines across integrated circuits using a digital bus | Navdeep Singh Dhanjal, Shengbing Zhou, Michael E. Bradley, Hossain Opal, Clint Wolff | 2019-04-30 |
| 6115764 | Acyclic cable bus having redundant path access | Andrew B. McNeill, Jr. | 2000-09-05 |
| 5968143 | Information handling system for transfer of command blocks to a local processing side without local processor intervention | Gary Hoch, Timothy V. Lee, Andrew B. McNeill, Jr., Ed Wachtel | 1999-10-19 |
| 5940866 | Information handling system having a local address queue for local storage of command blocks transferred from a host processing side | Gary Hoch, Timothy V. Lee, Andrew B. McNeill, Jr., Ed Wachtel | 1999-08-17 |
| 5802546 | Status handling for transfer of data blocks between a local side and a host side | Gary Hoch, Timothy V. Lee, Andrew B. McNeill, Jr., Ed Wachtel | 1998-09-01 |
| 5794069 | Information handling system using default status conditions for transfer of data blocks | Gary Hoch, Timothy V. Lee, Andrew B. McNeill, Jr., Ed Wachtel | 1998-08-11 |
| 5509124 | Coupled synchronous-asychronous bus structure for transferring data between a plurality of peripheral input/output controllers and a main data store | Donall G. Bourke, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu, Carl A. Malmquist +5 more | 1996-04-16 |
| 5455916 | Method for performing inter-unit data transfer operations among a plurality of input/output bus interface units coupled to a common asynchronous bus | Donall G. Bourke, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu, Carl A. Malmquist +5 more | 1995-10-03 |
| 5276814 | Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses | Donall G. Bourke, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu, Carl A. Malmquist +5 more | 1994-01-04 |
| 5199106 | Input output interface controller connecting a synchronous bus to an asynchronous bus and methods for performing operations on the bus | Donall G. Bourke, Gregory D. Float, Richard Allen Kelley, Roy Y. Liu, Carl A. Malmquist +5 more | 1993-03-30 |
| 5131082 | Command delivery for a computing system for transfers between a host and subsystem including providing direct commands or indirect commands indicating the address of the subsystem control block | Francis M. Bonevento, Sammy D. Dodds, Dhruvkumar M. Desai, Ernest N. Mandese, Andrew B. McNeill, Jr. +1 more | 1992-07-14 |
| 5119480 | Bus master interface circuit with transparent preemption of a data transfer operation | Serafin J. E. Garcia, Jr., Dean Kalman, Russell S. Padgett, Robert D. Yoder | 1992-06-02 |
| 5014186 | Data-processing system having a packet transfer type input/output system | — | 1991-05-07 |
| 5003465 | Method and apparatus for increasing system throughput via an input/output bus and enhancing address capability of a computer system during DMA read/write operations between a common memory and an input/output device | Robert G. Iseminger, Richard Allen Kelley, Wan L. Leung, James T. Moyer, Mark C. Snedaker | 1991-03-26 |
| 4373181 | Dynamic device address assignment mechanism for a data processing system | Hobart L. Kurtz | 1983-02-08 |
| 4246637 | Data processor input/output controller | Lewis W. Brown, Jerry D. Dixon | 1981-01-20 |