Issued Patents All Time
Showing 51–75 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9076847 | Selective local metal cap layer formation for improved electromigration behavior | Matthew S. Angyal, Junjing Bao, Griselda Bonilla, Samuel S. Choi, James A. Culp +4 more | 2015-07-07 |
| 9059173 | Electronic fuse line with modified cap | John A. Fitzsimmons, Erdem Kaltalioglu, Ping-Chuan Wang, Lijuan Zhang | 2015-06-16 |
| 9059170 | Electronic fuse having a damaged region | Junjing Bao, Griselda Bonilla, Samuel S. Choi, Wai-Kin Li, Erdem Kaltalioglu +4 more | 2015-06-16 |
| 9059169 | E-fuse structures and methods of manufacture | Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Stephan Grunow, Naftali E. Lustig +1 more | 2015-06-16 |
| 9059166 | Interconnect with hybrid metallization | Erdem Kaltalioglu, Ping-Chuan Wang, Lijuan Zhang | 2015-06-16 |
| 9054108 | Random local metal cap layer formation for improved integrated circuit reliability | Erdem Kaltalioglu, Wai-Kin Li, Ping-Chuan Wang, Lijuan Zhang | 2015-06-09 |
| 9034664 | Method to resolve hollow metal defects in interconnects | Griselda Bonilla, Junjing Bao, Samuel S. Choi, Naftali E. Lustig, Andrew H. Simon | 2015-05-19 |
| 8962467 | Metal fuse structure for improved programming capability | Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Stephan Grunow, Naftali E. Lustig +2 more | 2015-02-24 |
| 8921167 | Modified via bottom for BEOL via efuse | Junjing Bao, Griselda Bonilla, Samuel S. Choi, Naftali E. Lustig, Andrew H. Simon | 2014-12-30 |
| 8916461 | Electronic fuse vias in interconnect structures | Junjing Bao, Griselda Bonilla, Samuel S. Choi, Daniel C. Edelstein, Naftali E. Lustig +1 more | 2014-12-23 |
| 8912658 | Interconnect structure with enhanced reliability | Ping-Chuan Wang, Griselda Bonilla, Kaushik Chanda, Robert D. Edwards, Andrew H. Simon | 2014-12-16 |
| 8906799 | Random local metal cap layer formation for improved integrated circuit reliability | Erdem Kaltalioglu, Wai-Kin Li, Ping-Chuan Wang, Lijuan Zhang | 2014-12-09 |
| 8889491 | Method of forming electronic fuse line with modified cap | John A. Fitzsimmons, Erdem Kaltalioglu, Ping-Chuan Wang, Lijuan Zhang | 2014-11-18 |
| 8836124 | Fuse and integrated conductor | Griselda Bonilla, Kaushik Chanda, Samuel S. Choi, Stephan Grunow, Naftali E. Lustig +1 more | 2014-09-16 |
| 8742766 | Stacked via structure for metal fuse applications | Griselda Bonilla, Kaushik Chanda, Stephan Grunow, Naftali E. Lustig, Andrew H. Simon +1 more | 2014-06-03 |
| 8736020 | Electronic anti-fuse | Junjing Bao, Griselda Bonilla, Samuel S. Choi, Naftali E. Lustig, Andrew H. Simon | 2014-05-27 |
| 8716101 | Structure and method of reducing electromigration cracking and extrusion effects in semiconductor devices | Kaushik Chandra, Wai-Kin Li, Ping-Chuan Wang, Chih-Chao Yang | 2014-05-06 |
| 8633707 | Stacked via structure for metal fuse applications | Griselda Bonilla, Kaushik Chanda, Stephan Grunow, Naftali E. Lustig, Andrew H. Simon +1 more | 2014-01-21 |
| 8465657 | Post chemical mechanical polishing etch for improved time dependent dielectric breakdown reliability | Kaushik Chanda, James J. Demarest, Roy Iggulden, Edward W. Kiewara, Ping-Chuan Wang +1 more | 2013-06-18 |
| 8455351 | Method of forming an integrated circuit interconnect structure | Hanyi Ding, Jong-Ru Guo, Ping-Chuan Wang | 2013-06-04 |
| 8446014 | Integrated circuit interconnect structure | Hanyi Ding, Jong-Ru Guo, Ping-Chuan Wang | 2013-05-21 |
| 8420537 | Stress locking layer for reliable metallization | Kaushik Chanda, Charles C. Goldsmith, Ping-Chuan Wang, Chih-Chao Yang | 2013-04-16 |
| 8378447 | Electrically programmable fuse and fabrication method | Kaushik Chanda, Joseph M. Lukaitis, Ping-Chuan Wang | 2013-02-19 |
| 8349723 | Structure of power grid for semiconductor devices and method of making the same | Wai-Kin Li, Ping-Chuan Wang | 2013-01-08 |
| 8304863 | Electromigration immune through-substrate vias | John A. Fitzsimmons, Kevin Kolvenbach, Ping-Chuan Wang | 2012-11-06 |