Issued Patents All Time
Showing 351–375 of 471 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6278171 | Sublithographic fuses using a phase shift mask | Kenneth C. Arndt, Jack A. Mandelman, K. Paul Muller | 2001-08-21 |
| 6274467 | Dual work function gate conductors with self-aligned insulating cap | Jeffrey P. Gambino, Jack A. Mandelman, Carl Radens, William R. Tonti | 2001-08-14 |
| 6275096 | Charge pump system having multiple independently activated charge pumps and corresponding method | Oliver Weinfurtner, Matthew R. Wordeman | 2001-08-14 |
| 6259135 | MOS transistors structure for reducing the size of pitch limited circuits | Carl Radens | 2001-07-10 |
| 6259126 | Low cost mixed memory integration with FERAM | Jack A. Mandelman, Fariborz Assaderaghi | 2001-07-10 |
| 6255157 | Method for forming a ferroelectric capacitor under the bit line | David E. Kotecki, Jack A. Mandelman | 2001-07-03 |
| 6255712 | Semi-sacrificial diamond for air dielectric formation | Lawrence A. Clevenger | 2001-07-03 |
| 6252271 | Flash memory structure using sidewall floating gate and method for forming the same | Jeffrey P. Gambino, Jack A. Mandelman, Donald C. Wheeler | 2001-06-26 |
| 6245613 | Field effect transistor having a floating gate | Jack A. Mandelman, Chih-Chun Hu | 2001-06-12 |
| 6236617 | High performance CMOS word-line driver | Hans-Oliver Joachim, Matthew R. Wordeman, Hing Wong | 2001-05-22 |
| 6232154 | Optimized decoupling capacitor using lithographic dummy filler | Armin Reith, Henning Haffner, Gunther Lehmann | 2001-05-15 |
| 6232173 | Process for forming a memory structure that includes NVRAM, DRAM, and/or SRAM memory structures on one substrate and process for forming a new NVRAM cell structure | Jack A. Mandelman, Fariborz Assaderaghi | 2001-05-15 |
| 6228745 | Selective reduction of sidewall slope on isolation edge | Donald C. Wheeler, Jack A. Mandelman, Rebecca D. Mih | 2001-05-08 |
| 6222244 | Electrically blowable fuse with reduced cross-sectional area | Kenneth C. Arndt, Dureseti Chidambarrao, Jack A. Mandelman, Carl Radens | 2001-04-24 |
| 6214653 | Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate | Howard H. Chen, Li-Kong Wang | 2001-04-10 |
| 6207530 | Dual gate FET and process | Li-Kong Wang | 2001-03-27 |
| 6198677 | Boosted sensing ground circuit | Li-Kong Wang | 2001-03-06 |
| 6190986 | Method of producing sulithographic fuses using a phase shift mask | Kenneth C. Arndt, Jack A. Mandelman, K. Paul Muller | 2001-02-20 |
| 6177299 | Transistor having substantially isolated body and method of making the same | Jack A. Mandelman | 2001-01-23 |
| 6174762 | Salicide device with borderless contact | Gary B. Bronner, Jeffrey P. Gambino, Jack A. Mandelman, Carl Radens, William R. Tonti | 2001-01-16 |
| 6163045 | Reduced parasitic leakage in semiconductor devices | Jack A. Mandelman, Johann Alsmeier, William R. Tonti | 2000-12-19 |
| 6160292 | Circuit and methods to improve the operation of SOI devices | Roy C. Flaker, Jente B. Kuang | 2000-12-12 |
| 6157067 | Metal oxide semiconductor capacitor utilizing dummy lithographic patterns | Dmitry Netis | 2000-12-05 |
| 6151200 | Method of discharging SOI floating body charge | Jente B. Kuang, Somnuk Ratanaphanyarat, Mary J. Saccamango | 2000-11-21 |
| 6147402 | Refractory metal capped low resistivity metal conductor lines and vias | Rajiv V. Joshi, Jerome J. Cuomo, Hormazdyar M. Dalal | 2000-11-14 |