Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6551895 | Metal oxide semiconductor capacitor utilizing dummy lithographic patterns | Louis L. Hsu | 2003-04-22 |
| 6477630 | Hierarchical row activation method for banking control in multi-bank DRAM | Brian L. Ji, Toshiaki Kirihata | 2002-11-05 |
| 6400639 | Wordline decoder system and method | Brian L. Ji, Toshiaki Kirihata | 2002-06-04 |
| 6351429 | Binary to binary-encoded-ternary (BET) decoder using reordered logic | Louis L. Hsu, John M. Ross | 2002-02-26 |
| 6272062 | Semiconductor memory with programmable bitline multiplexers | Gerhard Mueller, Toshiaki Kirihata | 2001-08-07 |
| 6236258 | Wordline driver circuit using ring-shaped devices | Heinz Hoenigschmid | 2001-05-22 |
| 6185135 | Robust wordline activation delay monitor using a plurality of sample wordlines | L. Brian Ji, Toshiaki Kirihata | 2001-02-06 |
| 6157067 | Metal oxide semiconductor capacitor utilizing dummy lithographic patterns | Louis L. Hsu | 2000-12-05 |
| 6115310 | Wordline activation delay monitor using sample wordline located in data-storing array | L. Brian Ji, Toshiaki Kirihata | 2000-09-05 |