Issued Patents All Time
Showing 51–75 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10249753 | Gate cut on a vertical field effect transistor with a defined-width inorganic mask | Brent A. Anderson, Sivananda K. Kanakasabapathy, Jeffrey C. Shearer, Stuart A. Sieg, Junli Wang | 2019-04-02 |
| 10242981 | Fin cut during replacement gate formation | Andrew M. Greene, Balasubramanian Pranatharthiharan, Sivananda K. Kanakasabapathy | 2019-03-26 |
| 10229854 | FinFET gate cut after dummy gate removal | Siva Kanakasabapathy, Andrew M. Greene, Jeffrey C. Shearer, Nicole Saulnier | 2019-03-12 |
| 10224326 | Fin cut during replacement gate formation | Andrew M. Greene, Balasubramanian Pranatharthiharan, Sivananda K. Kanakasabapathy | 2019-03-05 |
| 10217634 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2019-02-26 |
| 10211321 | Stress retention in fins of fin field-effect transistors | Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li, Fee Li Lie, Stuart A. Sieg | 2019-02-19 |
| 10211319 | Stress retention in fins of fin field-effect transistors | Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li, Fee Li Lie, Stuart A. Sieg | 2019-02-19 |
| 10211055 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2019-02-19 |
| 10199503 | Under-channel gate transistors | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2019-02-05 |
| 10141445 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, Sean Teehan | 2018-11-27 |
| 10141230 | Method and structure to enable dual channel Fin critical dimension control | Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2018-11-27 |
| 10079287 | Gate cut device fabrication with extended height gates | Kangguo Cheng, Andrew M. Greene, Peng Xu | 2018-09-18 |
| 10074730 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2018-09-11 |
| 10049876 | Removal of trilayer resist without damage to underlying structure | Muthumanickam Sankarapandian, Soon-Cheon Seo, Indira Seshadri | 2018-08-14 |
| 10043801 | Air gap spacer for metal gates | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2018-08-07 |
| 10026615 | Fin patterns with varying spacing without Fin cut | Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2018-07-17 |
| 10014391 | Vertical transport field effect transistor with precise gate length definition | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2018-07-03 |
| 9997369 | Margin for fin cut using self-aligned triple patterning | Gauri Karve, Fee Li Lie, Eric R. Miller, Stuart A. Sieg, Sean Teehan | 2018-06-12 |
| 9991117 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2018-06-05 |
| 9984877 | Fin patterns with varying spacing without fin cut | Marc A. Bergendahl, Kangguo Cheng, Sean Teehan | 2018-05-29 |
| 9985138 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, Sean Teehan | 2018-05-29 |
| 9923080 | Gate height control and ILD protection | Andrew M. Greene, Stan Tsai, Ruilong Xie | 2018-03-20 |
| 9917196 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, Robert R. Robison +1 more | 2018-03-13 |
| 9911914 | Sub-lithographic magnetic tunnel junctions for magnetic random access memory devices | Anthony J. Annunziata, Babar A. Khan, Chandrasekara Kothandaraman | 2018-03-06 |
| 9905643 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, Sean Teehan | 2018-02-27 |