Issued Patents All Time
Showing 26–50 of 97 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10629698 | Method and structure for enabling high aspect ratio sacrificial gates | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, Sean Teehan | 2020-04-21 |
| 10629699 | Gate height control and ILD protection | Andrew M. Greene, Stan Tsai, Ruilong Xie | 2020-04-21 |
| 10622352 | Fin cut to prevent replacement gate collapse on STI | Andrew M. Greene, Balasubramanian Pranatharthiharan, Sivananda K. Kanakasabapathy | 2020-04-14 |
| 10615269 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2020-04-07 |
| 10607991 | Air gap spacer for metal gates | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2020-03-31 |
| 10600868 | FinFET gate cut after dummy gate removal | Siva Kanakasabapathy, Andrew M. Greene, Jeffrey C. Shearer, Nicole Saulnier | 2020-03-24 |
| 10593555 | Composite sacrificial gate with etch selective layer | Qun Gao, Naved Siddiqui, Ankur Arya | 2020-03-17 |
| 10573745 | Super long channel device within VFET architecture | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2020-02-25 |
| 10566524 | Sub-lithographic magnetic tunnel junctions for magnetic random access memory devices | Anthony J. Annunziata, Babar A. Khan, Chandrasekara Kothandaraman | 2020-02-18 |
| 10553581 | Air gap spacer for metal gates | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2020-02-04 |
| 10541308 | Gate cut device fabrication with extended height gates | Kangguo Cheng, Andrew M. Greene, Peng Xu | 2020-01-21 |
| 10504798 | Gate cut in replacement metal gate process | Ruilong Xie, Chanro Park, Laertis Economikos, Andrew M. Greene, Siva Kanakasabapathy | 2019-12-10 |
| 10446452 | Method and structure for enabling controlled spacer RIE | Kangguo Cheng, Ryan O. Jung, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2019-10-15 |
| 10438972 | Sub-fin removal for SOI like isolation with uniform active fin height | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2019-10-08 |
| 10424663 | Super long channel device within VFET architecture | Marc A. Bergendahl, Kangguo Cheng, Gauri Karve, Fee Li Lie, Eric R. Miller +1 more | 2019-09-24 |
| 10396181 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2019-08-27 |
| 10381437 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Eric R. Miller, Robert R. Robison +1 more | 2019-08-13 |
| 10347749 | Reducing bending in parallel structures in semiconductor fabrication | Balasubramanian Pranatharthiharan, Pietro Montanini, Ruilong Xie | 2019-07-09 |
| 10304689 | Margin for fin cut using self-aligned triple patterning | Gauri Karve, Fee Li Lie, Eric R. Miller, Stuart A. Sieg, Sean Teehan | 2019-05-28 |
| 10269931 | Vertical transport field effect transistor with precise gate length definition | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2019-04-23 |
| 10256239 | Spacer formation preventing gate bending | Balasubramanian Pranatharthiharan, Eric R. Miller, Soon-Cheon Seo | 2019-04-09 |
| 10256326 | Forming stacked nanowire semiconductor device | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Jeffrey C. Shearer +1 more | 2019-04-09 |
| 10249762 | Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors | Marc A. Bergendahl, Kangguo Cheng, Eric R. Miller, Sean Teehan | 2019-04-02 |
| 10249533 | Method and structure for forming a replacement contact | Jeffrey C. Shearer, Nicole Saulnier, Hyung Joo Shin | 2019-04-02 |
| 10249738 | Nanosheet channel-to-source and drain isolation | Marc A. Bergendahl, Kangguo Cheng, Fee Li Lie, Eric R. Miller, Sean Teehan | 2019-04-02 |