Issued Patents All Time
Showing 51–75 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8331125 | Array architecture and operation for high density magnetic racetrack memory system | — | 2012-12-11 |
| 8228706 | Magnetic shift register memory device | William J. Gallagher, Yu Lu | 2012-07-24 |
| 8023305 | High density planar magnetic domain wall memory apparatus | Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, Louis L. Hsu, Carl Radens +2 more | 2011-09-20 |
| 8009453 | High density planar magnetic domain wall memory apparatus | Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, Louis L. Hsu, Carl Radens +2 more | 2011-08-30 |
| 7596045 | Design structure for initializing reference cells of a toggle switched MRAM device | Mark C. H. Lamorey | 2009-09-29 |
| 7535783 | Apparatus and method for implementing precise sensing of PCRAM devices | Thomas M. Maffitt, Mark C. H. Lamorey | 2009-05-19 |
| 7514271 | Method of forming high density planar magnetic domain wall memory | Michael C. Gaidis, Lawrence A. Clevenger, Timothy J. Dalton, Louis L. Hsu, Carl Radens +2 more | 2009-04-07 |
| 7453740 | Method and apparatus for initializing reference cells of a toggle switched MRAM device | Mark C. H. Lamorey | 2008-11-18 |
| 7376006 | Enhanced programming performance in a nonvolatile memory device having a bipolar programmable storage element | Johannes G. Bednorz, Chung H. Lam, Gerhard Ingmar Meijer, Jonathan Zanhong Sun | 2008-05-20 |
| 7239537 | Method and apparatus for current sense amplifier calibration in MRAM devices | Dietmar Gogl, Stefan Lammers, Hans-Heinrich Viehmann | 2007-07-03 |
| 7192787 | Highly nonlinear magnetic tunnel junctions for dense magnetic random access memories | Yu Lu, Stuart Stephen Papworth Parkin | 2007-03-20 |
| 7135255 | Layout impact reduction with angled phase shapes | Scott Bukofsky, Marco Hug, Lars Liebmann, Daniel J. Nickel, Juergen Preuninger | 2006-11-14 |
| 7102916 | Method and structure for selecting anisotropy axis angle of MRAM device for reduced power consumption | Philip L. Trouilloud, David W. Abraham, Daniel C. Worledge | 2006-09-05 |
| 6982902 | MRAM array having a segmented bit line | Dietmar Gogl | 2006-01-03 |
| 6946882 | Current sense amplifier | Dietmar Gogl, William Robert Reohr | 2005-09-20 |
| 6944049 | Magnetic tunnel junction memory cell architecture | Heinz Hoenigschmid, Dietmar Gogl | 2005-09-13 |
| 6930915 | Cross-point MRAM array with reduced voltage drop across MTJ's | Stefan Lammers, Hans-Heinrich Viehmann | 2005-08-16 |
| 6816403 | Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices | Ciaran J. Brennan, Russell J. Houghton | 2004-11-09 |
| 6813181 | Circuit configuration for a current switch of a bit/word line of a MRAM device | Hans-Heinrich Viehmann | 2004-11-02 |
| 6704230 | Error detection and correction method and apparatus in a magnetoresistive random access memory | Heinz Hoenigschmid, Rainer Leuschner, Gerhard Mueller | 2004-03-09 |
| 6490217 | Select line architecture for magnetic random access memories | William Robert Reohr | 2002-12-03 |
| 6351019 | Planarized and fill biased integrated circuit chip | Matthew R. Wordeman | 2002-02-26 |
| 6285612 | Reduced bit line equalization level sensing scheme | — | 2001-09-04 |
| 6282113 | Four F-squared gapless dual layer bitline DRAM array architecture | — | 2001-08-28 |
| 6255683 | Dynamic random access memory | Carl Radens, Ulrike Gruening, Jack A. Mandelman | 2001-07-03 |